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authorMyles Watson <mylesgw@gmail.com>2009-10-23 22:53:26 +0000
committerMyles Watson <mylesgw@gmail.com>2009-10-23 22:53:26 +0000
commit036c15fe71c4ec69e4403e0957f6c84357177d49 (patch)
tree9447dc64aba1ba9fdea2bb622454c80f6ea56314 /src/mainboard
parentc21b5ee58470c16b4f31578fe19d10e66cb914ad (diff)
downloadcoreboot-staging-036c15fe71c4ec69e4403e0957f6c84357177d49.zip
coreboot-staging-036c15fe71c4ec69e4403e0957f6c84357177d49.tar.gz
Drop dead K8_SCAN_PCI_BUS code. It's a bad idea to scan the PCI busses before
RAM is initialized, and no one does it. Trivial. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4830 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/broadcom/blast/cache_as_ram_auto.c3
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/hp/dl145_g3/cache_as_ram_auto.c1
-rw-r--r--src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/iwill/dk8s2/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/iwill/dk8x/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/msi/ms7260/cache_as_ram_auto.c1
-rw-r--r--src/mainboard/msi/ms9185/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/sunw/ultra40/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/supermicro/h8dme/cache_as_ram_auto.c1
-rw-r--r--src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s2895/cache_as_ram_auto.c1
-rw-r--r--src/mainboard/tyan/s2912/cache_as_ram_auto.c2
16 files changed, 0 insertions, 29 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
index b39ae1e..a3e2b16 100644
--- a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
@@ -10,10 +10,8 @@
#define QRANK_DIMM_SUPPORT 1
//used by incoherent_ht
-//#define K8_SCAN_PCI_BUS 1
//#define K8_ALLOCATE_IO_RANGE 1
-
//used by init_cpus and fidvid
#define K8_SET_FIDVID 0
//if we want to wait for core1 done before DQS training, set it to 0
diff --git a/src/mainboard/broadcom/blast/cache_as_ram_auto.c b/src/mainboard/broadcom/blast/cache_as_ram_auto.c
index 5ac6f4b..3b94d3f 100644
--- a/src/mainboard/broadcom/blast/cache_as_ram_auto.c
+++ b/src/mainboard/broadcom/blast/cache_as_ram_auto.c
@@ -1,9 +1,6 @@
#define ASSEMBLY 1
#define __ROMCC__
-
-//#define K8_SCAN_PCI_BUS 1
-
#define QRANK_DIMM_SUPPORT 1
#if CONFIG_LOGICAL_CPUS==1
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c b/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c
index e81dc4c..056cd08 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c
@@ -27,8 +27,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
-
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c b/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
index 8128788..26e5ee9 100644
--- a/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
+++ b/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
@@ -25,8 +25,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
-
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c b/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c
index f786d9f..0f54f46 100644
--- a/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c
+++ b/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c
@@ -31,7 +31,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c b/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c
index f4213c1..76e56f8 100644
--- a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c
@@ -10,10 +10,8 @@
#define QRANK_DIMM_SUPPORT 1
//used by incoherent_ht
-//#define K8_SCAN_PCI_BUS 1
//#define K8_ALLOCATE_IO_RANGE 1
-
//used by init_cpus and fidvid
#define K8_SET_FIDVID 0
//if we want to wait for core1 done before DQS training, set it to 0
diff --git a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c b/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c
index e702d0e..78b1de9 100644
--- a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c
@@ -10,10 +10,8 @@
#define QRANK_DIMM_SUPPORT 1
//used by incoherent_ht
-//#define K8_SCAN_PCI_BUS 1
//#define K8_ALLOCATE_IO_RANGE 1
-
//used by init_cpus and fidvid
#define K8_SET_FIDVID 0
//if we want to wait for core1 done before DQS training, set it to 0
diff --git a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c b/src/mainboard/iwill/dk8x/cache_as_ram_auto.c
index e702d0e..78b1de9 100644
--- a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8x/cache_as_ram_auto.c
@@ -10,10 +10,8 @@
#define QRANK_DIMM_SUPPORT 1
//used by incoherent_ht
-//#define K8_SCAN_PCI_BUS 1
//#define K8_ALLOCATE_IO_RANGE 1
-
//used by init_cpus and fidvid
#define K8_SET_FIDVID 0
//if we want to wait for core1 done before DQS training, set it to 0
diff --git a/src/mainboard/msi/ms7260/cache_as_ram_auto.c b/src/mainboard/msi/ms7260/cache_as_ram_auto.c
index 6458a65..ed84a42 100644
--- a/src/mainboard/msi/ms7260/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms7260/cache_as_ram_auto.c
@@ -31,7 +31,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-// #define K8_SCAN_PCI_BUS 1 /* ? */
#define QRANK_DIMM_SUPPORT 1
#if CONFIG_LOGICAL_CPUS == 1
#define SET_NB_CFG_54 1
diff --git a/src/mainboard/msi/ms9185/cache_as_ram_auto.c b/src/mainboard/msi/ms9185/cache_as_ram_auto.c
index b95d55a..95704b9 100644
--- a/src/mainboard/msi/ms9185/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms9185/cache_as_ram_auto.c
@@ -35,10 +35,8 @@
#define QRANK_DIMM_SUPPORT 1
//used by incoherent_ht
-//#define K8_SCAN_PCI_BUS 1
//#define K8_ALLOCATE_IO_RANGE 1
-
//used by init_cpus and fidvid
#define K8_SET_FIDVID 1
//if we want to wait for core1 done before DQS training, set it to 0
diff --git a/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c b/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c
index 9962aef..04fa546 100644
--- a/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c
+++ b/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c
@@ -25,8 +25,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
-
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c b/src/mainboard/sunw/ultra40/cache_as_ram_auto.c
index 18af542..468e049 100644
--- a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c
+++ b/src/mainboard/sunw/ultra40/cache_as_ram_auto.c
@@ -3,8 +3,6 @@
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
-
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c
index 18435a6..151b2d0 100644
--- a/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c
+++ b/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c
@@ -22,7 +22,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-// #define K8_SCAN_PCI_BUS 1
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c
index 3a9b0ca..672f551 100644
--- a/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c
+++ b/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c
@@ -25,8 +25,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
-
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/tyan/s2895/cache_as_ram_auto.c b/src/mainboard/tyan/s2895/cache_as_ram_auto.c
index 0e144eb..77bd04d 100644
--- a/src/mainboard/tyan/s2895/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2895/cache_as_ram_auto.c
@@ -2,7 +2,6 @@
#define __ROMCC__
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/tyan/s2912/cache_as_ram_auto.c b/src/mainboard/tyan/s2912/cache_as_ram_auto.c
index c27e74b..8fb6473 100644
--- a/src/mainboard/tyan/s2912/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2912/cache_as_ram_auto.c
@@ -25,8 +25,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
-
#define QRANK_DIMM_SUPPORT 1
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