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author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-09-25 18:43:02 +0000 |
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committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-09-25 18:43:02 +0000 |
commit | 88f55b2c12f94fd0451902ee2edc663f12e401f4 (patch) | |
tree | 446179d449934a1dafeb2a2df44b8a515e380807 /src/mainboard/via/pc2500e | |
parent | 6bb3bdf869ab06a972520c5a58c6fc9b7cfe99f4 (diff) | |
download | coreboot-staging-88f55b2c12f94fd0451902ee2edc663f12e401f4.zip coreboot-staging-88f55b2c12f94fd0451902ee2edc663f12e401f4.tar.gz |
some progress on kconfig:
- northbridges are done
- southbridges are done
- Intel CPUs are done, with a design that the board only has to specify
the socket it has, and the CPUs are pulled in automatically. There is
some more cleanup possible in that area, but I'll do that later
- a couple more mainboards compile:
- intel/eagleheights
- intel/jarrell
- intel/mtarvon
- intel/truxton
- intel/xe7501devkit
- sunw/ultra40
- supermicro/h8dme
- tyan/s2850
- tyan/s2875
- via/epia
- via/epia-cn
- via/epia-m
- via/epia-m700
- via/epia-n
- via/pc2500e
(PPC not considered, probably overlooked something)
All of them only _build_, but some options are probably completely
wrong. To be fixed later
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via/pc2500e')
-rw-r--r-- | src/mainboard/via/pc2500e/Kconfig | 45 | ||||
-rw-r--r-- | src/mainboard/via/pc2500e/Makefile.inc | 63 |
2 files changed, 108 insertions, 0 deletions
diff --git a/src/mainboard/via/pc2500e/Kconfig b/src/mainboard/via/pc2500e/Kconfig new file mode 100644 index 0000000..be33783 --- /dev/null +++ b/src/mainboard/via/pc2500e/Kconfig @@ -0,0 +1,45 @@ +config BOARD_VIA_PC2500E + bool "PC2500E" + select ARCH_X86 + select CPU_VIA_C7 + select NORTHBRIDGE_VIA_CN700 + select SOUTHBRIDGE_VIA_VT8237R + select SUPERIO_ITE_IT8716F + select HAVE_PIRQ_TABLE + help + VIA PC2500E mainboard. + +config MAINBOARD_DIR + string + default via/pc2500e + depends on BOARD_VIA_PC2500E + +#config DCACHE_RAM_BASE +# hex +# default 0xffef0000 +# depends on BOARD_VIA_PC2500E +# +#config DCACHE_RAM_SIZE +# hex +# default 0x8000 +# depends on BOARD_VIA_PC2500E + +config MAINBOARD_PART_NUMBER + string + default "PC2500E" + depends on BOARD_VIA_PC2500E + +config VIDEO_MB + int + default 32 + depends on BOARD_VIA_PC2500E + +config RAMBASE + hex + default 0x4000 + depends on BOARD_VIA_PC2500E + +config IRQ_SLOT_COUNT + int + default 10 + depends on BOARD_VIA_PC2500E diff --git a/src/mainboard/via/pc2500e/Makefile.inc b/src/mainboard/via/pc2500e/Makefile.inc new file mode 100644 index 0000000..a6c8073 --- /dev/null +++ b/src/mainboard/via/pc2500e/Makefile.inc @@ -0,0 +1,63 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2008 VIA Technologies, Inc. +## (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA) +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +initobj-y += crt0.o +obj-y += mainboard.o +obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o +obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o + +obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o +obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o +obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o + +ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb +ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds +ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds +ldscript-y += ../../../../src/arch/i386/lib/id.lds +ldscript-y += ../../../../src/arch/i386/lib/failover.lds + +crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc +crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc +crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc +crt0-y += ../../../../src/arch/i386/lib/id.inc +crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc +crt0-y += ../../../../src/cpu/x86/mmx/enable_mmx.inc +crt0-y += auto.inc +crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc + +ifdef POST_EVALUATION + +MAINBOARD_OPTIONS= + +$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c + $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@ + +$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl + iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl + mv dsdt.hex $@ + +$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h + $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@ + perl -e 's/\.rodata/.rom.data/g' -pi $@ + perl -e 's/\.text/.section .rom.text/g' -pi $@ + +endif + |