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authorStefan Reinauer <stepan@openbios.org>2006-04-06 21:37:10 +0000
committerStefan Reinauer <stepan@openbios.org>2006-04-06 21:37:10 +0000
commit966d0e6d70b20b6d14e265d59aaad37ce84d2ddb (patch)
tree70a4ea1fb8f3de6912dd6e2064f832bd5a393bbc /src/mainboard/supermicro/x6dhr_ig/Config.lb
parent44f72eb3a3d07ec3c775b748f6a2a16e9e0a3e75 (diff)
downloadcoreboot-staging-966d0e6d70b20b6d14e265d59aaad37ce84d2ddb.zip
coreboot-staging-966d0e6d70b20b6d14e265d59aaad37ce84d2ddb.tar.gz
break the tree really quick due to svn restrictions, next commit fill fix it
again. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2240 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro/x6dhr_ig/Config.lb')
-rw-r--r--src/mainboard/supermicro/x6dhr_ig/Config.lb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/supermicro/x6dhr_ig/Config.lb b/src/mainboard/supermicro/x6dhr_ig/Config.lb
index e6cdc0c..2fb4ac6 100644
--- a/src/mainboard/supermicro/x6dhr_ig/Config.lb
+++ b/src/mainboard/supermicro/x6dhr_ig/Config.lb
@@ -134,7 +134,7 @@ config chip.h
chip northbridge/intel/E7520 # mch
device pci_domain 0 on
- chip southbridge/intel/ich5r # ich5r
+ chip southbridge/intel/i82801er # i82801er
# USB ports
device pci 1d.0 on end
device pci 1d.1 on end
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