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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-09 13:33:59 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-09 13:33:59 +0000 |
| commit | d41a0bc532c837705d5abc2334e1bbf9dd06eb83 (patch) | |
| tree | 9999b4b1d4f8b3f0e0cfb152d5ec7d6b4e3cca70 /src/mainboard/supermicro/x6dhe_g2 | |
| parent | aa987b23e4a639d1c6bfd6f3043a465874d56953 (diff) | |
| download | coreboot-staging-d41a0bc532c837705d5abc2334e1bbf9dd06eb83.zip coreboot-staging-d41a0bc532c837705d5abc2334e1bbf9dd06eb83.tar.gz | |
Drop the need for cpu_reset, it's really just a short cut to stage2.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5393 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro/x6dhe_g2')
| -rw-r--r-- | src/mainboard/supermicro/x6dhe_g2/romstage.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c index 46b1ca5..93df395 100644 --- a/src/mainboard/supermicro/x6dhe_g2/romstage.c +++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c @@ -52,6 +52,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/intel/e7520/raminit.c" #include "lib/generic_sdram.c" +#include "arch/i386/lib/stages.c" static void main(unsigned long bist) { @@ -78,7 +79,7 @@ static void main(unsigned long bist) /* Skip this if there was a built in self test failure */ early_mtrr_init(); if (memory_initialized()) { - asm volatile ("jmp __cpu_reset"); + skip_romstage(); } } /* Setup the console */ |
