diff options
author | Uwe Hermann <uwe@hermann-uwe.de> | 2009-11-06 17:11:05 +0000 |
---|---|---|
committer | Myles Watson <mylesgw@gmail.com> | 2009-11-06 17:11:05 +0000 |
commit | d63085b20ef40caae1c60a7532b5243e1e30b109 (patch) | |
tree | c732b7666d8082775022592eeddedff81375eeef /src/mainboard/msi | |
parent | eeec0ef00a6be64d6846599fe7cf81ead22e2f02 (diff) | |
download | coreboot-staging-d63085b20ef40caae1c60a7532b5243e1e30b109.zip coreboot-staging-d63085b20ef40caae1c60a7532b5243e1e30b109.tar.gz |
Drop all pre-CBFS rom_address entries in Config.lb/devicetree.cb.
Since we have CBFS setting rom_address in board files is no longer
necessary.
Also, drop vga_rom_address from RS690 completely, it was never used
in the code.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi')
-rw-r--r-- | src/mainboard/msi/ms6178/Config.lb | 1 | ||||
-rw-r--r-- | src/mainboard/msi/ms6178/devicetree.cb | 1 | ||||
-rw-r--r-- | src/mainboard/msi/ms9185/Config.lb | 2 | ||||
-rw-r--r-- | src/mainboard/msi/ms9185/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/msi/ms9282/Config.lb | 1 | ||||
-rw-r--r-- | src/mainboard/msi/ms9282/devicetree.cb | 1 |
6 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/msi/ms6178/Config.lb b/src/mainboard/msi/ms6178/Config.lb index d8cea81..5c6f9c0 100644 --- a/src/mainboard/msi/ms6178/Config.lb +++ b/src/mainboard/msi/ms6178/Config.lb @@ -77,7 +77,6 @@ chip northbridge/intel/i82810 # Northbridge device pci 0.0 on end # Host bridge chip drivers/pci/onboard # Onboard VGA device pci 1.0 on end - register "rom_address" = "0xfff80000" # 512 KB image end chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1" diff --git a/src/mainboard/msi/ms6178/devicetree.cb b/src/mainboard/msi/ms6178/devicetree.cb index ac56d65..1676ab5 100644 --- a/src/mainboard/msi/ms6178/devicetree.cb +++ b/src/mainboard/msi/ms6178/devicetree.cb @@ -28,7 +28,6 @@ chip northbridge/intel/i82810 # Northbridge device pci 0.0 on end # Host bridge chip drivers/pci/onboard # Onboard VGA device pci 1.0 on end - register "rom_address" = "0xfff80000" # 512 KB image end chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1" diff --git a/src/mainboard/msi/ms9185/Config.lb b/src/mainboard/msi/ms9185/Config.lb index c02f260..0af1b60 100644 --- a/src/mainboard/msi/ms9185/Config.lb +++ b/src/mainboard/msi/ms9185/Config.lb @@ -211,7 +211,6 @@ chip northbridge/amd/amdk8/root_complex chip drivers/pci/onboard device pci 3.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 4, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 3 - register "rom_address" = "0xfff80000" end #bx_a013+ start #chip drivers/pci/onboard #SATA2 @@ -229,7 +228,6 @@ chip northbridge/amd/amdk8/root_complex # end # chip drivers/pci/onboard # device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed -# register "rom_address" = "0xfff80000" # end end # device pci 18.0 diff --git a/src/mainboard/msi/ms9185/devicetree.cb b/src/mainboard/msi/ms9185/devicetree.cb index 23f6c87..3f02199 100644 --- a/src/mainboard/msi/ms9185/devicetree.cb +++ b/src/mainboard/msi/ms9185/devicetree.cb @@ -77,7 +77,6 @@ chip northbridge/amd/amdk8/root_complex chip drivers/pci/onboard device pci 3.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 4, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 3 - register "rom_address" = "0xfff80000" end #bx_a013+ start #chip drivers/pci/onboard #SATA2 @@ -95,7 +94,6 @@ chip northbridge/amd/amdk8/root_complex # end # chip drivers/pci/onboard # device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed -# register "rom_address" = "0xfff80000" # end end # device pci 18.0 diff --git a/src/mainboard/msi/ms9282/Config.lb b/src/mainboard/msi/ms9282/Config.lb index c5a82d3..c0c4ed1 100644 --- a/src/mainboard/msi/ms9282/Config.lb +++ b/src/mainboard/msi/ms9282/Config.lb @@ -280,7 +280,6 @@ chip northbridge/amd/amdk8/root_complex device pci 6.0 on #P2P chip drivers/pci/onboard device pci 4.0 on end - register "rom_address" = "0xfff80000" end end # P2P device pci 7.0 on end # reserve diff --git a/src/mainboard/msi/ms9282/devicetree.cb b/src/mainboard/msi/ms9282/devicetree.cb index 6fd476b..bf33440 100644 --- a/src/mainboard/msi/ms9282/devicetree.cb +++ b/src/mainboard/msi/ms9282/devicetree.cb @@ -139,7 +139,6 @@ chip northbridge/amd/amdk8/root_complex device pci 6.0 on #P2P chip drivers/pci/onboard device pci 4.0 on end - register "rom_address" = "0xfff80000" end end # P2P device pci 7.0 on end # reserve |