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author | Stefan Reinauer <stepan@openbios.org> | 2005-12-04 17:50:32 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2005-12-04 17:50:32 +0000 |
commit | 453dfdfdafbc2d10ec9289699a22e8c4fd8c2ad6 (patch) | |
tree | ed7e246a34073a368c8195bd0748fa9daffb4a01 /src/mainboard/digitallogic/adl855pc | |
parent | a09ab6dc531aa7d14706b6a912e5feb476426ab2 (diff) | |
download | coreboot-staging-453dfdfdafbc2d10ec9289699a22e8c4fd8c2ad6.zip coreboot-staging-453dfdfdafbc2d10ec9289699a22e8c4fd8c2ad6.tar.gz |
implement io based udelay function for all mainboards that lack an apic
timer (or just failed otherwise due to missing udelay)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/digitallogic/adl855pc')
-rw-r--r-- | src/mainboard/digitallogic/adl855pc/Options.lb | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/digitallogic/adl855pc/Options.lb b/src/mainboard/digitallogic/adl855pc/Options.lb index 9549c3d..dc85a6f 100644 --- a/src/mainboard/digitallogic/adl855pc/Options.lb +++ b/src/mainboard/digitallogic/adl855pc/Options.lb @@ -6,6 +6,7 @@ uses HAVE_HARD_RESET uses HAVE_OPTION_TABLE uses USE_OPTION_TABLE uses CONFIG_ROM_STREAM +uses CONFIG_UDELAY_IO uses IRQ_SLOT_COUNT uses MAINBOARD uses MAINBOARD_VENDOR @@ -59,6 +60,11 @@ default HAVE_MP_TABLE=0 default HAVE_HARD_RESET=1 ## +## use io based udelay function +## +default CONFIG_UDELAY_IO=1 + +## ## Build code to export a programmable irq routing table ## default HAVE_PIRQ_TABLE=1 |