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author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-08-12 15:00:51 +0000 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2009-08-12 15:00:51 +0000 |
commit | 0588d19abef62dad63a7794a37bdd6a71c526d9e (patch) | |
tree | 1c507caa1ffed6ceb73d3e13fc9b766a713d16e2 /src/mainboard/digitallogic/adl855pc | |
parent | 38cd29ebd7282333650cf11ed50c7f2fd4031e80 (diff) | |
download | coreboot-staging-0588d19abef62dad63a7794a37bdd6a71c526d9e.zip coreboot-staging-0588d19abef62dad63a7794a37bdd6a71c526d9e.tar.gz |
Kconfig!
Works on Kontron, qemu, and serengeti.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
tested on abuild only.
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/digitallogic/adl855pc')
-rw-r--r-- | src/mainboard/digitallogic/adl855pc/devicetree.cb | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/src/mainboard/digitallogic/adl855pc/devicetree.cb b/src/mainboard/digitallogic/adl855pc/devicetree.cb new file mode 100644 index 0000000..f0106b0 --- /dev/null +++ b/src/mainboard/digitallogic/adl855pc/devicetree.cb @@ -0,0 +1,61 @@ +chip northbridge/intel/i855pm + device pci_domain 0 on + device pci 0.0 on end + device pci 1.0 on end + chip southbridge/intel/i82801dbm +# pci 11.0 on end +# pci 11.1 on end +# pci 11.2 on end +# pci 11.3 on end +# pci 11.4 on end +# pci 11.5 on end +# pci 11.6 on end +# pci 12.0 on end + register "enable_usb" = "0" + register "enable_native_ide" = "0" + register "enable_usb" = "0" + register "enable_native_ide" = "0" + chip superio/winbond/w83627hf # link 1 + device pnp 2e.0 on # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.1 off # Parallel Port + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 2e.2 on # Com1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.3 off # Com2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.5 on # Keyboard + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + irq 0x72 = 12 + end + device pnp 2e.6 off end # CIR + device pnp 2e.7 off end # GAME_MIDI_GIPO1 + device pnp 2e.8 off end # GPIO2 + device pnp 2e.9 off end # GPIO3 + device pnp 2e.a off end # ACPI + device pnp 2e.b on # HW Monitor + io 0x60 = 0x290 + end + register "com1" = "{1}" + # register "com1" = "{1, 0, 0x3f8, 4}" + # register "lpt" = "{1}" + end + end + end + device apic_cluster 0 on + chip cpu/intel/socket_mPGA479M + device apic 0 on end + end + end +end |