amdk8/amdfam10: Use CAR_GLOBAL for sysinfo

This gets rid of the somewhat unstructured placement of AMD's
sysinfo structure in CAR.
We used to carve out some CAR space using a Kconfig variable,
and then put sysinfo there manually (by "virtue" of pointer magic).

Now it's a variable with the CAR_GLOBAL qualifier, and build
system magic.

For this, the following steps were done (but must happen together
since the intermediates won't build):
- Add new CAR_GLOBAL sysinfo_car
- point all sysinfo pointers to sysinfo_car instead of GLOBAL_VAR
- remove DCACHE_RAM_GLOBAL_VAR_SIZE
  - from CAR setup (no need to reserve the space)
  - commented out code (that was commented out for years)
  - only copy sizeof(sysinfo) into RAM after ram init, where
    before it copied the whole GLOBAL_VAR area.
  - from Kconfig

Change-Id: I3cbcccd883ca6751326c8e32afde2eb0c91229ed
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1887
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Marc Jones <marcj303@gmail.com>

15 files changed, 9 insertions, 39 deletions

diff --git a/src/mainboard/asus/a8v-e_deluxe/Kconfig b/src/mainboard/asus/a8v-e_deluxe/Kconfig
index 96260bc..1f0d2e9 100644
--- a/src/mainboard/asus/a8v-e_deluxe/Kconfig
+++ b/src/mainboard/asus/a8v-e_deluxe/Kconfig
@@ -31,10 +31,6 @@ config DCACHE_RAM_SIZE
 	hex
 	default 0x4000
 
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-	hex
-	default 0x1000
-
 config APIC_ID_OFFSET
 	hex
 	default 0x10
diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c
index 3c4f640..1f8da48 100644
--- a/src/mainboard/asus/a8v-e_deluxe/romstage.c
+++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c
@@ -153,8 +153,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	};
 	unsigned bsp_apicid = 0;
 	int needs_reset = 0;
-	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
-		+ CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+	struct sys_info *sysinfo = &sysinfo_car;
 
 	sio_init();
 	w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/asus/a8v-e_se/Kconfig b/src/mainboard/asus/a8v-e_se/Kconfig
index 80efbf6..8159a43 100644
--- a/src/mainboard/asus/a8v-e_se/Kconfig
+++ b/src/mainboard/asus/a8v-e_se/Kconfig
@@ -31,10 +31,6 @@ config DCACHE_RAM_SIZE
 	hex
 	default 0x4000
 
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-	hex
-	default 0x1000
-
 config APIC_ID_OFFSET
 	hex
 	default 0x10
diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c
index 014c5b0..c78e63e 100644
--- a/src/mainboard/asus/a8v-e_se/romstage.c
+++ b/src/mainboard/asus/a8v-e_se/romstage.c
@@ -153,8 +153,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	};
 	unsigned bsp_apicid = 0;
 	int needs_reset = 0;
-	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
-		+ CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+	struct sys_info *sysinfo = &sysinfo_car;
 
 	sio_init();
 	w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/asus/k8v-x/Kconfig b/src/mainboard/asus/k8v-x/Kconfig
index ff11218..28c2c81 100644
--- a/src/mainboard/asus/k8v-x/Kconfig
+++ b/src/mainboard/asus/k8v-x/Kconfig
@@ -30,10 +30,6 @@ config DCACHE_RAM_SIZE
 	hex
 	default 0x4000
 
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-	hex
-	default 0x1000
-
 config APIC_ID_OFFSET
 	hex
 	default 0x10
diff --git a/src/mainboard/asus/k8v-x/romstage.c b/src/mainboard/asus/k8v-x/romstage.c
index a0963da..18e840c 100644
--- a/src/mainboard/asus/k8v-x/romstage.c
+++ b/src/mainboard/asus/k8v-x/romstage.c
@@ -124,8 +124,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	};
 	unsigned bsp_apicid = 0;
 	int needs_reset = 0;
-	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
-		+ CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+	struct sys_info *sysinfo = &sysinfo_car;
 
 	sio_init();
 	w83697hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/asus/m2n-e/Kconfig b/src/mainboard/asus/m2n-e/Kconfig
index 08b0680..088b6bf 100644
--- a/src/mainboard/asus/m2n-e/Kconfig
+++ b/src/mainboard/asus/m2n-e/Kconfig
@@ -52,10 +52,6 @@ config DCACHE_RAM_SIZE
 	hex
 	default 0x08000
 
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-	hex
-	default 0x01000
-
 config APIC_ID_OFFSET
 	hex
 	default 0x10
diff --git a/src/mainboard/asus/m2n-e/romstage.c b/src/mainboard/asus/m2n-e/romstage.c
index aedd5cd..601f542 100644
--- a/src/mainboard/asus/m2n-e/romstage.c
+++ b/src/mainboard/asus/m2n-e/romstage.c
@@ -98,8 +98,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		DIMM1, DIMM3, 0, 0,	/* Channel B (DIMM_B1, DIMM_B2) */
 	};
 
-	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
-		+ CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+	struct sys_info *sysinfo = &sysinfo_car;
 	int needs_reset = 0;
 	unsigned bsp_apicid = 0;
 
diff --git a/src/mainboard/asus/m2v-mx_se/Kconfig b/src/mainboard/asus/m2v-mx_se/Kconfig
index 0ee9058..8a3a698 100644
--- a/src/mainboard/asus/m2v-mx_se/Kconfig
+++ b/src/mainboard/asus/m2v-mx_se/Kconfig
@@ -50,10 +50,6 @@ config DCACHE_RAM_SIZE
 	hex
 	default 0x4000
 
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-	hex
-	default 0x01000
-
 config APIC_ID_OFFSET
 	hex
 	default 0x10
diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c
index 681ffcb..0ccec58 100644
--- a/src/mainboard/asus/m2v-mx_se/romstage.c
+++ b/src/mainboard/asus/m2v-mx_se/romstage.c
@@ -132,8 +132,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	};
 	unsigned bsp_apicid = 0;
 	int needs_reset = 0;
-	struct sys_info *sysinfo =
-	    (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+	struct sys_info *sysinfo = &sysinfo_car;
 
 	it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 	it8712f_kill_watchdog();
diff --git a/src/mainboard/asus/m2v/Kconfig b/src/mainboard/asus/m2v/Kconfig
index 731e0de..61ffd9a 100644
--- a/src/mainboard/asus/m2v/Kconfig
+++ b/src/mainboard/asus/m2v/Kconfig
@@ -35,10 +35,6 @@ config DCACHE_RAM_SIZE
 	hex
 	default 0x4000
 
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-	hex
-	default 0x1000
-
 config APIC_ID_OFFSET
 	hex
 	default 0x10
diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c
index db6d2c8..451cb33 100644
--- a/src/mainboard/asus/m2v/romstage.c
+++ b/src/mainboard/asus/m2v/romstage.c
@@ -230,8 +230,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	};
 	unsigned bsp_apicid = 0;
 	int needs_reset = 0;
-	struct sys_info *sysinfo =
-	    (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+	struct sys_info *sysinfo = &sysinfo_car;
 
 	it8712f_24mhz_clkin();
 	it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c
index 50bbfca..07c2de3 100644
--- a/src/mainboard/asus/m4a78-em/romstage.c
+++ b/src/mainboard/asus/m4a78-em/romstage.c
@@ -76,7 +76,7 @@ static int spd_read_byte(u32 device, u32 address)
 
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+	struct sys_info *sysinfo = &sysinfo_car;
 	static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
 	u32 bsp_apicid = 0, val;
 	msr_t msr;
diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c
index 1fe7b49..10aa14a 100644
--- a/src/mainboard/asus/m4a785-m/romstage.c
+++ b/src/mainboard/asus/m4a785-m/romstage.c
@@ -76,7 +76,7 @@ static int spd_read_byte(u32 device, u32 address)
 
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+	struct sys_info *sysinfo = &sysinfo_car;
 	static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
 	u32 bsp_apicid = 0, val;
 	msr_t msr;
diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c
index 22d87b3..9884dc2 100644
--- a/src/mainboard/asus/m5a88-v/romstage.c
+++ b/src/mainboard/asus/m5a88-v/romstage.c
@@ -85,7 +85,7 @@ void soft_reset(void)
 #define SERIAL_DEV PNP_DEV(0x4e, IT8721F_SP1)
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+	struct sys_info *sysinfo = &sysinfo_car;
 	static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
 	u32 bsp_apicid = 0, val;
 	msr_t msr;