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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2009-10-07 16:29:12 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2009-10-07 16:29:12 +0000 |
| commit | 869bbc46166bdfe0b785b5a64ebcea2f167e1b0c (patch) | |
| tree | d3148fb5ed537986611c1a83513bf1a383760e8c /src/mainboard/amd | |
| parent | 168b11bc416eb0931581cc674a60bc53861081c3 (diff) | |
| download | coreboot-staging-869bbc46166bdfe0b785b5a64ebcea2f167e1b0c.zip coreboot-staging-869bbc46166bdfe0b785b5a64ebcea2f167e1b0c.tar.gz | |
Convert all "default y" options to "select FOO" (shorter).
Also, drop per-board CONSOLE_VGA/PCI_ROM_RUN while I'm at it, they're
global options in kconfig.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4735 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd')
| -rw-r--r-- | src/mainboard/amd/serengeti_cheetah/Kconfig | 56 |
1 files changed, 6 insertions, 50 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah/Kconfig b/src/mainboard/amd/serengeti_cheetah/Kconfig index e04c019..bae96ec 100644 --- a/src/mainboard/amd/serengeti_cheetah/Kconfig +++ b/src/mainboard/amd/serengeti_cheetah/Kconfig @@ -11,6 +11,12 @@ config BOARD_AMD_SERENGETI_CHEETAH select HAVE_PIRQ_TABLE select USE_PRINTK_IN_CAR select USE_DCACHE_RAM + select HAVE_HARD_RESET + select IOAPIC + select MEM_TRAIN_SEQ + select AP_CODE_IN_CAR + select SB_HT_CHAIN_UNITID_OFFSET_ONLY + select WAIT_BEFORE_CPUS_INIT config MAINBOARD_DIR string @@ -37,16 +43,6 @@ config APIC_ID_OFFSET default 0x8 depends on BOARD_AMD_SERENGETI_CHEETAH -config HAVE_HARD_RESET - bool - default y - depends on BOARD_AMD_SERENGETI_CHEETAH - -config IOAPIC - bool - default y - depends on BOARD_AMD_SERENGETI_CHEETAH - config LB_CKS_RANGE_END int default 122 @@ -67,11 +63,6 @@ config HW_MEM_HOLE_SIZEK default 0x100000 depends on BOARD_AMD_SERENGETI_CHEETAH -config MEM_TRAIN_SEQ - bool - default y - depends on BOARD_AMD_SERENGETI_CHEETAH - config MAX_CPUS int default 8 @@ -82,26 +73,11 @@ config MAX_PHYSICAL_CPUS default 4 depends on BOARD_AMD_SERENGETI_CHEETAH -config MEM_TRAIN_SEQ - bool - default y - depends on BOARD_AMD_SERENGETI_CHEETAH - -config AP_CODE_IN_CAR - bool - default y - depends on BOARD_AMD_SERENGETI_CHEETAH - config HW_MEM_HOLE_SIZE_AUTO_INC bool default n depends on BOARD_AMD_SERENGETI_CHEETAH -config SB_HT_CHAIN_UNITID_OFFSET_ONLY - bool - default y - depends on BOARD_AMD_SERENGETI_CHEETAH - config SB_HT_CHAIN_ON_BUS0 int default 2 @@ -127,26 +103,6 @@ config SERIAL_CPU_INIT default n depends on BOARD_AMD_SERENGETI_CHEETAH -config AP_CODE_IN_CAR - bool - default y - depends on BOARD_AMD_SERENGETI_CHEETAH - -config WAIT_BEFORE_CPUS_INIT - bool - default y - depends on BOARD_AMD_SERENGETI_CHEETAH - -config CONSOLE_VGA - bool - default y - depends on BOARD_AMD_SERENGETI_CHEETAH - -config PCI_ROM_RUN - bool - default y - depends on BOARD_AMD_SERENGETI_CHEETAH - config IRQ_SLOT_COUNT int default 11 |
