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| author | Myles Watson <mylesgw@gmail.com> | 2009-11-06 17:32:32 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2009-11-06 17:32:32 +0000 |
| commit | 547d48ab01049a634dccb16d1847524d5ba93e33 (patch) | |
| tree | bd6f680c5ad439285b2c69f399ffd97a413a765c /src/mainboard/amd | |
| parent | d63085b20ef40caae1c60a7532b5243e1e30b109 (diff) | |
| download | coreboot-staging-547d48ab01049a634dccb16d1847524d5ba93e33.zip coreboot-staging-547d48ab01049a634dccb16d1847524d5ba93e33.tar.gz | |
Remove some white space and comment differences from devicetree.cb and Config.lb
files.
These boards have non-trivial differences:
gigabyte/m57sli
kontron/986lcd-m
dell/s1850
via/epia-m700
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4924 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd')
| -rw-r--r-- | src/mainboard/amd/dbm690t/Config.lb | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/pistachio/Config.lb | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/amd/dbm690t/Config.lb b/src/mainboard/amd/dbm690t/Config.lb index a40bf65..8fffd80 100644 --- a/src/mainboard/amd/dbm690t/Config.lb +++ b/src/mainboard/amd/dbm690t/Config.lb @@ -136,7 +136,7 @@ config chip.h #Define gpp_configuration, A=0, B=1, C=2, D=3, E=4(default) #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7) #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3, -# 1: the system allows a PCIE link to be established on Dev2 or Dev3. +# 1: the system allows a PCIE link to be established on Dev2 or Dev3. #Define gfx_dual_slot, 0: single slot, 1: dual slot #Define gfx_lane_reversal, 0: disable lane reversal, 1: enable #Define gfx_tmds, 0: didn't support TMDS, 1: support diff --git a/src/mainboard/amd/pistachio/Config.lb b/src/mainboard/amd/pistachio/Config.lb index 146ab50..93925fa 100644 --- a/src/mainboard/amd/pistachio/Config.lb +++ b/src/mainboard/amd/pistachio/Config.lb @@ -136,7 +136,7 @@ config chip.h #Define gpp_configuration, A=0, B=1, C=2, D=3, E=4(default) #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7) #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3, -# 1: the system allows a PCIE link to be established on Dev2 or Dev3. +# 1: the system allows a PCIE link to be established on Dev2 or Dev3. #Define gfx_dual_slot, 0: single slot, 1: dual slot #Define gfx_lane_reversal, 0: disable lane reversal, 1: enable #Define gfx_tmds, 0: didn't support TMDS, 1: support |
