diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2009-11-10 22:17:15 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2009-11-10 22:17:15 +0000 |
commit | c0ac7e9046b52ae4bd13269a98c12b0172562d5c (patch) | |
tree | 6b0733ff6adcde6137791263d7c3465dce1eb82a /src/arch | |
parent | a0141f050bd8ebbecf65b5eba2af0e321e69e4c8 (diff) | |
download | coreboot-staging-c0ac7e9046b52ae4bd13269a98c12b0172562d5c.zip coreboot-staging-c0ac7e9046b52ae4bd13269a98c12b0172562d5c.tar.gz |
* Simplify acpi_add_table
* fix some comments
* Simplify ACPI wakeup code and make it work without a memory hole
* Add resume entries to global GDT so we don't need our own for resume.
* add ECDT description to acpi.h for anyone who might need it ;-)
* remove rather stupid math to get the right number of MAX_ACPI_TABLES
and just define a reasonable maximum for now.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4932 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/i386/boot/acpi.c | 109 | ||||
-rw-r--r-- | src/arch/i386/boot/wakeup.S | 126 | ||||
-rw-r--r-- | src/arch/i386/include/arch/acpi.h | 47 | ||||
-rw-r--r-- | src/arch/i386/lib/c_start.S | 23 |
4 files changed, 199 insertions, 106 deletions
diff --git a/src/arch/i386/boot/acpi.c b/src/arch/i386/boot/acpi.c index 928a49f..beef891 100644 --- a/src/arch/i386/boot/acpi.c +++ b/src/arch/i386/boot/acpi.c @@ -18,7 +18,8 @@ * write_acpi_tables() * acpi_dump_apics() * - * See AMD Solo, Island Aruma or Via Epia-M port for more details. + * See Kontron 986LCD-M port for a good example of an ACPI implementation + * in coreboot. */ #include <console/console.h> @@ -26,6 +27,7 @@ #include <arch/acpi.h> #include <arch/acpigen.h> #include <device/pci.h> +#include <cbmem.h> u8 acpi_checksum(u8 *table, u32 length) { @@ -37,54 +39,67 @@ u8 acpi_checksum(u8 *table, u32 length) return -ret; } -/* - * add an acpi table to rsdt structure, and recalculate checksum +/** + * Add an ACPI table to the RSDT (and XSDT) structure, recalculate length and checksum */ void acpi_add_table(acpi_rsdp_t *rsdp, void *table) { - int i; + int i, entries_num; acpi_rsdt_t *rsdt; acpi_xsdt_t *xsdt = NULL; + /* The RSDT is mandatory ... */ rsdt = (acpi_rsdt_t *)rsdp->rsdt_address; + + /* ... while the XSDT is not */ if (rsdp->xsdt_address) { xsdt = (acpi_xsdt_t *)((u32)rsdp->xsdt_address); } - int entries_num = ARRAY_SIZE(rsdt->entry); - - for (i=0; i<entries_num; i++) { - if(rsdt->entry[i]==0) { - rsdt->entry[i]=(u32)table; - /* fix length to stop kernel whining about invalid entries */ - rsdt->header.length = sizeof(acpi_header_t) + (sizeof(u32) * (i+1)); - /* fix checksum */ - /* hope this won't get optimized away */ - rsdt->header.checksum=0; - rsdt->header.checksum=acpi_checksum((u8 *)rsdt, - rsdt->header.length); - - /* And now the same thing for the XSDT. We use the same - * index as we want the XSDT and RSDT to always be in - * sync in coreboot. - */ - if (xsdt) { - xsdt->entry[i]=(u64)(u32)table; - xsdt->header.length = sizeof(acpi_header_t) + - (sizeof(u64) * (i+1)); - xsdt->header.checksum=0; - xsdt->header.checksum=acpi_checksum((u8 *)xsdt, - xsdt->header.length); - } - - printk_debug("ACPI: added table %d/%d Length now %d\n", - i+1, entries_num, rsdt->header.length); - return; - } + /* This should always be MAX_ACPI_TABLES */ + entries_num = ARRAY_SIZE(rsdt->entry); + + for (i = 0; i < entries_num; i++) { + if(rsdt->entry[i] == 0) + break; } - printk_err("ACPI: Error: Could not add ACPI table, too many tables.\n"); + if (i >= entries_num) { + printk_err("ACPI: Error: Could not add ACPI table, too many tables.\n"); + return; + } + + /* Add table to the RSDT */ + rsdt->entry[i] = (u32)table; + + /* Fix RSDT length or the kernel will assume invalid entries */ + rsdt->header.length = sizeof(acpi_header_t) + (sizeof(u32) * (i+1)); + + /* Re-calculate checksum */ + rsdt->header.checksum = 0; /* Hope this won't get optimized away */ + rsdt->header.checksum = acpi_checksum((u8 *)rsdt, + rsdt->header.length); + + /* And now the same thing for the XSDT. We use the same index as for + * now we want the XSDT and RSDT to always be in sync in coreboot. + */ + if (xsdt) { + /* Add table to the XSDT */ + xsdt->entry[i]=(u64)(u32)table; + + /* Fix XSDT length */ + xsdt->header.length = sizeof(acpi_header_t) + + (sizeof(u64) * (i+1)); + + /* Re-calculate checksum */ + xsdt->header.checksum=0; + xsdt->header.checksum=acpi_checksum((u8 *)xsdt, + xsdt->header.length); + } + + printk_debug("ACPI: added table %d/%d Length now %d\n", + i+1, entries_num, rsdt->header.length); } int acpi_create_mcfg_mmconfig(acpi_mcfg_mmconfig_t *mmconfig, u32 base, u16 seg_nr, u8 start, u8 end) @@ -222,7 +237,8 @@ void acpi_create_mcfg(acpi_mcfg_t *mcfg) } /* this can be overriden by platform ACPI setup code, - if it calls acpi_create_ssdt_generator */ + * if it calls acpi_create_ssdt_generator + */ unsigned long __attribute__((weak)) acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) { return current; @@ -560,10 +576,29 @@ extern char *lowmem_backup; extern char *lowmem_backup_ptr; extern int lowmem_backup_size; +#define WAKEUP_BASE 0x600 + +void (*acpi_do_wakeup)(u32 vector, u32 backup_source, u32 backup_target, u32 + backup_size) __attribute__((regparm(0))) = (void *)WAKEUP_BASE; + +extern unsigned char __wakeup, __wakeup_size; + void acpi_jump_to_wakeup(void *vector) { + u32 acpi_backup_memory = (u32) cbmem_find(CBMEM_ID_RESUME); + + if (!acpi_backup_memory) { + printk(BIOS_WARNING, "ACPI: Backup memory missing. No S3 Resume.\n"); + return; + } + + // FIXME this should go into the ACPI backup memory, too. No pork saussages. /* just restore the SMP trampoline and continue with wakeup on assembly level */ memcpy(lowmem_backup_ptr, lowmem_backup, lowmem_backup_size); - acpi_jmp_to_realm_wakeup((u32) vector); + + /* copy wakeup trampoline in place */ + memcpy(WAKEUP_BASE, &__wakeup, &__wakeup_size); + + acpi_do_wakeup((u32)vector, acpi_backup_memory, CONFIG_RAMBASE, HIGH_MEMORY_SAVE); } #endif diff --git a/src/arch/i386/boot/wakeup.S b/src/arch/i386/boot/wakeup.S index 7915fc3..b348e95 100644 --- a/src/arch/i386/boot/wakeup.S +++ b/src/arch/i386/boot/wakeup.S @@ -2,10 +2,11 @@ * This file is part of the coreboot project. * * Copyright (C) 2009 Rudolf Marek <r.marek@assembler.cz> + * Copyright (C) 2009 coresystems GmbH * * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License v2 as published by - * the Free Software Foundation. + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of @@ -16,76 +17,89 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - .text - .code32 - .globl acpi_jmp_to_realm_wakeup - /* This function does the PM -> RM switch, but - it can run >1MB even in real mode */ -acpi_jmp_to_realm_wakeup: - mov 0x4(%esp), %eax +#define WAKEUP_BASE 0x600 +#define RELOCATED(x) (x - __wakeup + WAKEUP_BASE) + +/* CR0 bits */ +#define PE (1 << 0) + + .code32 + .globl __wakeup +__wakeup: + /* First prepare the jmp to the resume vector */ + mov 0x4(%esp), %eax /* vector */ /* last 4 bits of linear addr are taken as offset */ andw $0x0f, %ax - movw %ax, (jmp_off) + movw %ax, (__wakeup_offset) mov 0x4(%esp), %eax /* the rest is taken as segment */ shr $4, %eax - movw %ax, (jmp_seg) - lgdt gdtaddr_wakeup - movl $0x008,%eax - mov %eax,%ds - movl %eax,%es - movl %eax,%ss - movl %eax,%fs - movl %eax,%gs - ljmp $0x0010,$reload_cs - .code16gcc -reload_cs: - /* switch off PE */ + movw %ax, (__wakeup_segment) + + /* Then overwrite coreboot with our backed up memory */ + movl 8(%esp), %esi + movl 12(%esp), %edi + movl 16(%esp), %ecx + shrl $4, %ecx +1: + movl 0(%esi),%eax + movl 4(%esi),%edx + movl 8(%esi),%ebx + movl 12(%esi),%ebp + addl $16,%esi + subl $1,%ecx + movl %eax,0(%edi) + movl %edx,4(%edi) + movl %ebx,8(%edi) + movl %ebp,12(%edi) + leal 16(%edi),%edi + jne 1b + + /* Activate the right segment descriptor real mode. */ + ljmp $0x28, $RELOCATED(1f) +1: +.code16 + /* 16 bit code from here on... */ + + /* Load the segment registers w/ properly configured + * segment descriptors. They will retain these + * configurations (limits, writability, etc.) once + * protected mode is turned off. + */ + mov $0x30, %ax + mov %ax, %ds + mov %ax, %es + mov %ax, %fs + mov %ax, %gs + mov %ax, %ss + + /* Turn off protection */ movl %cr0, %eax - andb $0xfe,%al + andl $~PE, %eax movl %eax, %cr0 - ljmpl $0x0, $cpu_flushed -cpu_flushed: + + /* Now really going into real mode */ + ljmp $0, $RELOCATED(1f) +1: movw $0x0, %ax movw %ax, %ds movw %ax, %es movw %ax, %ss movw %ax, %fs movw %ax, %gs - /* far jump to OS waking vector. The linear addr is changed to SEG and OFFSET - check ACPI specs or above code for details */ - .byte 0xea -jmp_off: - .word 0 -jmp_seg: - .word 0 -.code32 -gdt_wakeup_limit = gdt_wakeup_end - gdt_wakeup - 1 /* compute the table limit */ - gdtaddr_wakeup: - .word gdt_wakeup_limit /* the table limit */ - .long gdt_wakeup /* we know the offset */ - - .data - - /* This is the gdt for GCC part of coreboot. - * It is different from the gdt in ROMCC/ASM part of coreboot - * which is defined in entry32.inc */ -gdt_wakeup: - /* selgdt 0, unused */ - .word 0x0000, 0x0000 /* dummy */ - .byte 0x00, 0x00, 0x00, 0x00 + /* This is a FAR JMP to the OS waking vector. The C code changed + * the address to be correct. + */ + .byte 0xea - /* selgdt 8, flat data segment 16bit */ - .word 0x0000, 0x0000 /* dummy */ - .byte 0x00, 0x93, 0x8f, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */ +__wakeup_offset = RELOCATED(.) + .word 0x0000 - /* selgdt 0x10, flat code segment 16bit */ - .word 0xffff, 0x0000 - .byte 0x00, 0x9b, 0x8f, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */ +__wakeup_segment = RELOCATED(.) + .word 0x0000 -gdt_wakeup_end: + .globl __wakeup_size +__wakeup_size = ( . - __wakeup) - .previous -.code32 diff --git a/src/arch/i386/include/arch/acpi.h b/src/arch/i386/include/arch/acpi.h index 85b8445..21ec64e 100644 --- a/src/arch/i386/include/arch/acpi.h +++ b/src/arch/i386/include/arch/acpi.h @@ -1,16 +1,27 @@ /* * coreboot ACPI Support - headers and defines. - * + * * written by Stefan Reinauer <stepan@coresystems.de> * Copyright (C) 2004 SUSE LINUX AG + * Copyright (C) 2004 Nick Barker * Copyright (C) 2008-2009 coresystems GmbH * - * The ACPI table structs are based on the Linux kernel sources. - * ACPI FADT & FACS added by Nick Barker <nick.barker9@btinternet.com> - * those parts (C) 2004 Nick Barker + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA */ - #ifndef __ASM_ACPI_H #define __ASM_ACPI_H @@ -48,6 +59,12 @@ typedef struct acpi_gen_regaddr { u32 addrh; } __attribute__ ((packed)) acpi_addr_t; +#define ACPI_ADDRESS_SPACE_MEMORY 0 +#define ACPI_ADDRESS_SPACE_IO 1 +#define ACPI_ADDRESS_SPACE_PCI 2 +#define ACPI_ADDRESS_SPACE_FIXED 0x7f + + /* Generic ACPI Header, provided by (almost) all tables */ typedef struct acpi_table_header /* ACPI common table header */ @@ -63,12 +80,8 @@ typedef struct acpi_table_header /* ACPI common table header */ u32 asl_compiler_revision; /* ASL compiler revision number */ } __attribute__ ((packed)) acpi_header_t; -/* FIXME: This is very fragile: - * MCONFIG, HPET, FADT, SRAT, SLIT, MADT(APIC), SSDT, SSDTX, and SSDT for CPU - * pstate - */ - -#define MAX_ACPI_TABLES (7 + CONFIG_ACPI_SSDTX_NUM + CONFIG_MAX_CPUS) +/* A maximum number of 32 ACPI tables ought to be enough for now */ +#define MAX_ACPI_TABLES 32 /* RSDT */ typedef struct acpi_rsdt { @@ -330,6 +343,16 @@ typedef struct acpi_facs { // #define ACPI_FACS_S4BIOS_F (1 << 0) +typedef struct acpi_ecdt { + struct acpi_table_header header; + struct acpi_gen_regaddr ec_control; + struct acpi_gen_regaddr ec_data; + u32 uid; + u8 gpe_bit; + u8 ec_id[]; +} __attribute__ ((packed)) acpi_ecdt_t; + + /* These are implemented by the target port */ unsigned long write_acpi_tables(unsigned long addr); unsigned long acpi_fill_madt(unsigned long current); @@ -382,7 +405,7 @@ extern u8 acpi_slp_type; void suspend_resume(void); void *acpi_find_wakeup_vector(void); void *acpi_get_wakeup_rsdp(void); -void acpi_jmp_to_realm_wakeup(u32 linear_addr); +void acpi_jmp_to_realm_wakeup(u32 linear_addr) __attribute__((regparm(0))); void acpi_jump_to_wakeup(void *wakeup_addr); int acpi_get_sleep_type(void); diff --git a/src/arch/i386/lib/c_start.S b/src/arch/i386/lib/c_start.S index d2d8b43..4ef5979 100644 --- a/src/arch/i386/lib/c_start.S +++ b/src/arch/i386/lib/c_start.S @@ -253,7 +253,16 @@ gdtaddr: /* This is the gdt for GCC part of coreboot. * It is different from the gdt in ROMCC/ASM part of coreboot - * which is defined in entry32.inc */ /* BUT WHY?? */ + * which is defined in entry32.inc + * + * When the machine is initially started, we use a very simple + * gdt from rom (that in entry32.inc) which only contains those + * entries we need for protected mode. + * + * When we're executing code from RAM, we want to do more complex + * stuff, like initializing PCI option roms in real mode, or doing + * a resume from a suspend to ram. + */ gdt: /* selgdt 0, unused */ .word 0x0000, 0x0000 /* dummy */ @@ -275,6 +284,8 @@ gdt: .word 0x0000, 0x0000 /* dummy */ .byte 0x00, 0x00, 0x00, 0x00 + /* The next two entries are used for executing VGA option ROMs */ + /* selgdt 0x28 16-bit 64k code at 0x00000000 */ .word 0xffff, 0x0000 .byte 0, 0x9a, 0, 0 @@ -282,6 +293,16 @@ gdt: /* selgdt 0x30 16-bit 64k data at 0x00000000 */ .word 0xffff, 0x0000 .byte 0, 0x92, 0, 0 + + /* The next two entries are used for ACPI S3 RESUME */ + + /* selgdt 0x38, flat data segment 16bit */ + .word 0x0000, 0x0000 /* dummy */ + .byte 0x00, 0x93, 0x8f, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */ + + /* selgdt 0x40, flat code segment 16bit */ + .word 0xffff, 0x0000 + .byte 0x00, 0x9b, 0x8f, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */ gdt_end: idtarg: |