diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2009-10-26 17:04:28 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2009-10-26 17:04:28 +0000 |
commit | 3b314023802c7429012e5f09652047e0b32fb97a (patch) | |
tree | 897ca57220eac3007d0864cc47205103b91417da /src/arch | |
parent | a769344d437d608a2e714a01cdb847a2a69d0826 (diff) | |
download | coreboot-staging-3b314023802c7429012e5f09652047e0b32fb97a.zip coreboot-staging-3b314023802c7429012e5f09652047e0b32fb97a.tar.gz |
CBMEM high table memory manager.
This code adds a very simple toc based memory manager for the high tables area.
The purpose of this code is to make it simpler and more reliable to find
certain data structures in memory. This will also make it possible to have ACPI
S3 Resume working without an ugly hole at 31MB.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/i386/boot/Config.lb | 1 | ||||
-rw-r--r-- | src/arch/i386/boot/Makefile.inc | 1 | ||||
-rw-r--r-- | src/arch/i386/boot/gdt.c | 59 | ||||
-rw-r--r-- | src/arch/i386/boot/tables.c | 196 |
4 files changed, 181 insertions, 76 deletions
diff --git a/src/arch/i386/boot/Config.lb b/src/arch/i386/boot/Config.lb index b365cf9..ec5c669 100644 --- a/src/arch/i386/boot/Config.lb +++ b/src/arch/i386/boot/Config.lb @@ -19,3 +19,4 @@ if CONFIG_HAVE_ACPI_RESUME object wakeup.S end end +object gdt.o diff --git a/src/arch/i386/boot/Makefile.inc b/src/arch/i386/boot/Makefile.inc index c785a6b..6905f99 100644 --- a/src/arch/i386/boot/Makefile.inc +++ b/src/arch/i386/boot/Makefile.inc @@ -1,6 +1,7 @@ obj-y += boot.o obj-y += coreboot_table.o obj-$(CONFIG_MULTIBOOT) += multiboot.o +obj-y += gdt.o obj-y += tables.o obj-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.o obj-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.o diff --git a/src/arch/i386/boot/gdt.c b/src/arch/i386/boot/gdt.c new file mode 100644 index 0000000..2325027 --- /dev/null +++ b/src/arch/i386/boot/gdt.c @@ -0,0 +1,59 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <types.h> +#include <string.h> +#include <cbmem.h> +#include <console/console.h> + +// Global Descriptor Table, defined in c_start.S +extern char gdt; +extern char gdt_end; + +/* i386 lgdt argument */ +struct gdtarg { + u16 limit; + u32 base; +} __attribute__((packed)); + +// Copy GDT to new location and reload it +void move_gdt(void) +{ + void *newgdt; + u16 num_gdt_bytes = &gdt_end - &gdt; + struct gdtarg gdtarg; + + newgdt = cbmem_find(CBMEM_ID_GDT); + if (!newgdt) { + newgdt = cbmem_add(CBMEM_ID_GDT, ALIGN(num_gdt_bytes, 512)); + if (!newgdt) { + printk(BIOS_ERR, "Error: Could not relocate GDT.\n"); + return; + } + printk_debug("Moving GDT to %#lx...", newgdt); + memcpy((void*)newgdt, &gdt, num_gdt_bytes); + } + + gdtarg.base = newgdt; + gdtarg.limit = num_gdt_bytes - 1; + + __asm__ __volatile__ ("lgdt %0\n\t" : : "m" (gdtarg)); + printk_debug("ok\n"); +} + diff --git a/src/arch/i386/boot/tables.c b/src/arch/i386/boot/tables.c index b5f3316..a6c44eb 100644 --- a/src/arch/i386/boot/tables.c +++ b/src/arch/i386/boot/tables.c @@ -19,8 +19,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -/* 2006.1 yhlu add mptable cross 0x467 processing */ - #include <console/console.h> #include <cpu/cpu.h> #include <boot/tables.h> @@ -31,34 +29,20 @@ #include <string.h> #include <cpu/x86/multiboot.h> #include "coreboot_table.h" +#include <cbmem.h> -// Global Descriptor Table, defined in c_start.S -extern uint8_t gdt; -extern uint8_t gdt_end; +uint64_t high_tables_base = 0; +uint64_t high_tables_size; -/* i386 lgdt argument */ -struct gdtarg { - unsigned short limit; - unsigned int base; -} __attribute__((packed)); +void cbmem_list(void); -// Copy GDT to new location and reload it -void move_gdt(unsigned long newgdt) +void move_gdt(void); +void cbmem_arch_init(void) { - uint16_t num_gdt_bytes = &gdt_end - &gdt; - struct gdtarg gdtarg; - - printk_debug("Moving GDT to %#lx...", newgdt); - memcpy((void*)newgdt, &gdt, num_gdt_bytes); - gdtarg.base = newgdt; - gdtarg.limit = num_gdt_bytes - 1; - __asm__ __volatile__ ("lgdt %0\n\t" : : "m" (gdtarg)); - printk_debug("ok\n"); + /* defined in gdt.c */ + move_gdt(); } -uint64_t high_tables_base = 0; -uint64_t high_tables_size; - struct lb_memory *write_tables(void) { unsigned long low_table_start, low_table_end; @@ -68,15 +52,16 @@ struct lb_memory *write_tables(void) * the low and the high area, so payloads and OSes don't need to know * about the high tables. */ - unsigned long high_table_end=0; + unsigned long high_table_pointer; - if (high_tables_base) { - printk_debug("High Tables Base is %llx.\n", high_tables_base); - high_table_end = high_tables_base; - } else { + if (!high_tables_base) { printk_err("ERROR: High Tables Base is not set.\n"); + // Are there any boards without? + // Stepan thinks we should die() here! } + printk_debug("High Tables Base is %llx.\n", high_tables_base); + rom_table_start = 0xf0000; rom_table_end = 0xf0000; @@ -87,7 +72,9 @@ struct lb_memory *write_tables(void) low_table_start = 0; low_table_end = 0x500; - post_code(0x99); +#if CONFIG_GENERATE_PIRQ_TABLE == 1 +#define MAX_PIRQ_TABLE_SIZE (4 * 1024) + post_code(0x9a); /* This table must be between 0x0f0000 and 0x100000 */ rom_table_end = write_pirq_routing_table(rom_table_end); @@ -96,26 +83,87 @@ struct lb_memory *write_tables(void) /* And add a high table version for those payloads that * want to live in the F segment */ - if (high_tables_base) { - high_table_end = write_pirq_routing_table(high_table_end); - high_table_end = ALIGN(high_table_end, 1024); + high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_PIRQ, MAX_PIRQ_TABLE_SIZE); + if (high_table_pointer) { + unsigned long new_high_table_pointer; + new_high_table_pointer = write_pirq_routing_table(high_table_pointer); + // FIXME make pirq table code intelligent enough to know how + // much space it's going to need. + if (new_high_table_pointer > (high_table_pointer + MAX_PIRQ_TABLE_SIZE)) { + printk(BIOS_ERR, "ERROR: Increase PIRQ size.\n"); + } + printk(BIOS_DEBUG, "PIRQ table: %ld bytes.\n", + new_high_table_pointer - high_table_pointer); } - post_code(0x9a); +#endif + +#if CONFIG_GENERATE_MP_TABLE == 1 +#define MAX_MP_TABLE_SIZE (4 * 1024) + post_code(0x9b); + + /* The smp table must be in 0-1K, 639K-640K, or 960K-1M */ + rom_table_end = write_smp_table(rom_table_end); + rom_table_end = ALIGN(rom_table_end, 1024); + + high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_MPTABLE, MAX_MP_TABLE_SIZE); + if (high_table_pointer) { + unsigned long new_high_table_pointer; + new_high_table_pointer = write_smp_table(high_table_pointer); + // FIXME make mp table code intelligent enough to know how + // much space it's going to need. + if (new_high_table_pointer > (high_table_pointer + MAX_MP_TABLE_SIZE)) { + printk(BIOS_ERR, "ERROR: Increase MP table size.\n"); + } + + printk(BIOS_DEBUG, "MP table: %ld bytes.\n", + new_high_table_pointer - high_table_pointer); + } +#endif /* CONFIG_GENERATE_MP_TABLE */ - /* Write ACPI tables to F segment and high tables area */ #if CONFIG_GENERATE_ACPI_TABLES == 1 - if (high_tables_base) { - unsigned long acpi_start = high_table_end; +#define MAX_ACPI_SIZE (47 * 1024) + post_code(0x9c); + + /* Write ACPI tables to F segment and high tables area */ + + /* Ok, this is a bit hacky still, because some day we want to have this + * completely dynamic. But right now we are setting fixed sizes. + * It's probably still better than the old high_table_base code because + * now at least we know when we have an overflow in the area. + * + * We want to use 1MB - 64K for Resume backup. We use 512B for TOC and + * 512 byte for GDT, 4K for PIRQ and 4K for MP table and 8KB for the + * coreboot table. This leaves us with 47KB for all of ACPI. Let's see + * how far we get. + */ + high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_ACPI, MAX_ACPI_SIZE); + if (high_table_pointer) { + unsigned long acpi_start = high_table_pointer; + unsigned long new_high_table_pointer; + rom_table_end = ALIGN(rom_table_end, 16); - high_table_end = write_acpi_tables(high_table_end); - while (acpi_start < high_table_end) { + new_high_table_pointer = write_acpi_tables(high_table_pointer); + if (new_high_table_pointer > ( high_table_pointer + MAX_ACPI_SIZE)) { + printk(BIOS_ERR, "ERROR: Increase ACPI size\n"); + } + printk(BIOS_DEBUG, "ACPI tables: %ld bytes.\n", + new_high_table_pointer - high_table_pointer); + + /* Now we need to create a low table copy of the RSDP. */ + + /* First we look for the high table RSDP */ + while (acpi_start < new_high_table_pointer) { if (memcmp(((acpi_rsdp_t *)acpi_start)->signature, RSDP_SIG, 8) == 0) { break; } acpi_start++; } - if (acpi_start != high_table_end) { + + /* Now, if we found the RSDP, we take the RSDT and XSDT pointer + * from it in order to write the low RSDP + */ + if (acpi_start < new_high_table_pointer) { acpi_rsdp_t *low_rsdp = (acpi_rsdp_t *)rom_table_end, *high_rsdp = (acpi_rsdp_t *)acpi_start; @@ -125,65 +173,61 @@ struct lb_memory *write_tables(void) } else { printk_err("ERROR: Didn't find RSDP in high table.\n"); } - high_table_end = ALIGN(high_table_end, 1024); rom_table_end = ALIGN(rom_table_end + sizeof(acpi_rsdp_t), 16); } else { rom_table_end = write_acpi_tables(rom_table_end); rom_table_end = ALIGN(rom_table_end, 1024); } -#endif - post_code(0x9b); - -#if CONFIG_GENERATE_MP_TABLE == 1 - /* The smp table must be in 0-1K, 639K-640K, or 960K-1M */ - rom_table_end = write_smp_table(rom_table_end); - rom_table_end = ALIGN(rom_table_end, 1024); - - /* ... and a copy in the high tables */ - if (high_tables_base) { - high_table_end = write_smp_table(high_table_end); - high_table_end = ALIGN(high_table_end, 1024); - } -#endif /* CONFIG_GENERATE_MP_TABLE */ - - post_code(0x9c); - // Relocate the GDT to reserved memory, so it won't get clobbered - if (high_tables_base) { - move_gdt(high_table_end); - high_table_end += &gdt_end - &gdt; - high_table_end = ALIGN(high_table_end, 1024); - } else { - move_gdt(low_table_end); - low_table_end += &gdt_end - &gdt; - } +#endif +#if CONFIG_MULTIBOOT post_code(0x9d); -#if CONFIG_MULTIBOOT /* The Multiboot information structure */ rom_table_end = write_multiboot_info( low_table_start, low_table_end, rom_table_start, rom_table_end); #endif - post_code(0x9e); +#define MAX_COREBOOT_TABLE_SIZE (8 * 1024) + post_code(0x9d); + + high_table_pointer = cbmem_add(CBMEM_ID_CBTABLE, MAX_COREBOOT_TABLE_SIZE); + + if (high_table_pointer) { + unsigned long new_high_table_pointer; - if (high_tables_base) { /* Also put a forwarder entry into 0-4K */ - write_coreboot_table(low_table_start, low_table_end, - high_tables_base, high_table_end); - if (high_table_end > high_tables_base + high_tables_size) - printk_err("%s: High tables didn't fit in %llx (%llx)\n", - __func__, high_tables_size, high_table_end - - high_tables_base); + new_high_table_pointer = write_coreboot_table(low_table_start, low_table_end, + high_tables_base, high_table_pointer); + + if (new_high_table_pointer > (high_table_pointer + + MAX_COREBOOT_TABLE_SIZE)) + printk_err("%s: coreboot table didn't fit (%llx)\n", + __func__, new_high_table_pointer - + high_table_pointer); + + printk(BIOS_DEBUG, "coreboot table: %ld bytes.\n", + new_high_table_pointer - high_table_pointer); } else { /* The coreboot table must be in 0-4K or 960K-1M */ write_coreboot_table(low_table_start, low_table_end, rom_table_start, rom_table_end); } - post_code(0x9f); + post_code(0x9e); + +#if CONFIG_HAVE_ACPI_RESUME + /* Let's prepare the ACPI S3 Resume area now already, so we can rely on + * it begin there during reboot time. We don't need the pointer, nor + * the result right now. If it fails, ACPI resume will be disabled. + */ + cbmem_add(CBMEM_ID_RESUME, 1024 * (1024-64)); +#endif + + // Remove before sending upstream + cbmem_list(); return get_lb_mem(); } |