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author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-01-04 20:09:27 +0000 |
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committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-01-04 20:09:27 +0000 |
commit | 1f807fd42f4c4d175c2af1357979fdf235f0be9a (patch) | |
tree | 4cb7b0ab245a5b14e1e15ff59ffa51e849a47f70 /src/arch | |
parent | ce56835a5cc2cb762ecba0d672a9d33fbfc2f7fd (diff) | |
download | coreboot-staging-1f807fd42f4c4d175c2af1357979fdf235f0be9a.zip coreboot-staging-1f807fd42f4c4d175c2af1357979fdf235f0be9a.tar.gz |
- Fix UDELAY options and HAVE_INIT_TIMER [kconfig]
(defaults to UDELAY_IO again, like newconfig)
- Use UDELAY_TSC on Via C7 [kconfig]
- Support Tinybootblock on Intel CPUs
- set XIP location correctly for Tinybootblock on Intel
- provide correct XIP location in Tinybootblock configuration
- Make kontron/986lcd-m use Tinybootblock
- Some kconfig fixes to kontron/986lcd-m [kconfig]
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/i386/Makefile.tinybootblock.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/i386/Makefile.tinybootblock.inc b/src/arch/i386/Makefile.tinybootblock.inc index a3f38ce..4aa6a84 100644 --- a/src/arch/i386/Makefile.tinybootblock.inc +++ b/src/arch/i386/Makefile.tinybootblock.inc @@ -67,13 +67,13 @@ $(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootbl # Build the romstage $(obj)/coreboot.romstage: $(obj)/coreboot.pre1 $(initobjs) $(obj)/romstage/ldscript.ld @printf " LINK $(subst $(obj)/,,$(@))\n" - printf "CONFIG_ROMBASE = 0x0;\n" > $(obj)/location.ld + printf "CONFIG_ROMBASE = 0x0;\nAUTO_XIP_ROM_BASE = 0x0;\n" > $(obj)/location.ld $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(initobjs) $(OBJCOPY) -O binary $(obj)/romstage.elf $(obj)/romstage.bin printf "CONFIG_ROMBASE = 0x" > $(obj)/location.ld $(CBFSTOOL) $(obj)/coreboot.pre1 locate $(obj)/romstage.bin fallback/romstage $(CONFIG_XIP_ROM_SIZE) > $(obj)/location.txt cat $(obj)/location.txt >> $(obj)/location.ld - printf ";\n" >> $(obj)/location.ld + printf ';\nAUTO_XIP_ROM_BASE = CONFIG_ROMBASE & ~(CONFIG_XIP_ROM_SIZE - 1);\n' >> $(obj)/location.ld $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(initobjs) $(NM) -n $(obj)/romstage.elf | sort > $(obj)/romstage.map $(OBJCOPY) -O binary $(obj)/romstage.elf $@ |