After this has been brought up many times before, rename src/arch/i386 to

src/arch/x86. 

Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

117 files changed, 82 insertions, 82 deletions

diff --git a/Makefile b/Makefile
index 8a441db..4361b20 100644
--- a/Makefile
+++ b/Makefile
@@ -114,7 +114,7 @@ endif
 
 strip_quotes = $(subst ",,$(subst \",,$(1)))
 
-ARCHDIR-$(CONFIG_ARCH_X86)    := i386
+ARCHDIR-$(CONFIG_ARCH_X86)    := x86
 ARCHDIR-$(CONFIG_ARCH_POWERPC) := ppc
 
 MAINBOARDDIR=$(call strip_quotes,$(CONFIG_MAINBOARD_DIR))
diff --git a/src/Kconfig b/src/Kconfig
index 9153ca0..4c1fcf4 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -101,7 +101,7 @@ config USE_OPTION_TABLE
 endmenu
 
 source src/mainboard/Kconfig
-source src/arch/i386/Kconfig
+source src/arch/x86/Kconfig
 
 menu "Chipset"
 
@@ -481,7 +481,7 @@ config GDB_STUB
 	default y
 	help
 	  If enabled, you will be able to set breakpoints for gdb debugging.
-	  See src/arch/i386/lib/c_start.S for details.
+	  See src/arch/x86/lib/c_start.S for details.
 
 config HAVE_DEBUG_RAM_SETUP
 	def_bool n
@@ -740,7 +740,7 @@ config LLSHELL
 	help
 	  If enabled, you will have a low level shell to examine your machine.
 	  Put llshell() in your (romstage) code to start the shell.
-	  See src/arch/i386/llshell/llshell.inc for details.
+	  See src/arch/x86/llshell/llshell.inc for details.
 
 endmenu
 
diff --git a/src/arch/i386/init/Makefile.inc b/src/arch/i386/init/Makefile.inc
deleted file mode 100644
index 98077e8..0000000
--- a/src/arch/i386/init/Makefile.inc
+++ /dev/null
@@ -1 +0,0 @@
-# If you add something to this file, enable it in src/arch/i386/Makefile.inc first.
diff --git a/src/arch/i386/Kconfig b/src/arch/x86/Kconfig
index ef86d99..ef86d99 100644
--- a/src/arch/i386/Kconfig
+++ b/src/arch/x86/Kconfig
diff --git a/src/arch/i386/Makefile.bigbootblock.inc b/src/arch/x86/Makefile.bigbootblock.inc
index ee988c7..a606816 100644
--- a/src/arch/i386/Makefile.bigbootblock.inc
+++ b/src/arch/x86/Makefile.bigbootblock.inc
@@ -26,7 +26,7 @@ $(obj)/mainboard/$(MAINBOARDDIR)/crt0.romstage.o: $(obj)/mainboard/$(MAINBOARDDI
 
 $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(obj)/crt0.S
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -MMD -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $< -o $@
+	$(CC) -MMD -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $< -o $@
 
 $(obj)/coreboot: $$(romstage-objs) $(obj)/ldscript.ld
 	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
diff --git a/src/arch/i386/Makefile.bootblock.inc b/src/arch/x86/Makefile.bootblock.inc
index 6d975ac..f522fc2 100644
--- a/src/arch/i386/Makefile.bootblock.inc
+++ b/src/arch/x86/Makefile.bootblock.inc
@@ -23,24 +23,24 @@ $(obj)/coreboot.bootblock: $(obj)/bootblock.elf
 	@printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
 	$(OBJCOPY) -O binary $< $@
 
-bootblock_lds = $(src)/arch/i386/init/ldscript_failover.lb
+bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb
 bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds
 bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds
-bootblock_lds += $(src)/arch/i386/lib/id.lds
+bootblock_lds += $(src)/arch/x86/lib/id.lds
 bootblock_lds += $(chipset_bootblock_lds)
 
-bootblock_inc = $(src)/arch/i386/init/prologue.inc
+bootblock_inc = $(src)/arch/x86/init/prologue.inc
 bootblock_inc += $(src)/cpu/x86/16bit/entry16.inc
 bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc
 bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc
-bootblock_inc += $(src)/arch/i386/lib/id.inc
+bootblock_inc += $(src)/arch/x86/lib/id.inc
 bootblock_inc += $(chipset_bootblock_inc)
 
 ifeq ($(CONFIG_SSE),y)
 bootblock_inc += $(src)/cpu/x86/sse_enable.inc
 endif
 bootblock_inc += $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc
-bootblock_inc += $(src)/arch/i386/lib/walkcbfs.S
+bootblock_inc += $(src)/arch/x86/lib/walkcbfs.S
 
 bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__
 ifeq ($(CONFIG_SSE),y)
@@ -63,9 +63,9 @@ $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o: $(obj)/mainboard/$(MAINBOARDDIR)/b
 
 $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.S
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -MMD -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -I$(obj)/bootblock -include $(obj)/config.h -I. -I$(src) $< -o $@
+	$(CC) -MMD -DASSEMBLY -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/bootblock -include $(obj)/config.h -I. -I$(src) $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/i386/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc
+$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc
 	@printf "    ROMCC      $(subst $(obj)/,,$(@))\n"
 	$(CC) -MM -MT$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc \
 		$< > $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc.d
@@ -113,5 +113,5 @@ $(obj)/mainboard/$(MAINBOARDDIR)/crt0.romstage.o: $(obj)/mainboard/$(MAINBOARDDI
 
 $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(obj)/romstage/crt0.S
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -MMD -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -I$(obj)/romstage -include $(obj)/config.h -I. -I$(src) $< -o $@
+	$(CC) -MMD -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/romstage -include $(obj)/config.h -I. -I$(src) $< -o $@
 
diff --git a/src/arch/i386/Makefile.inc b/src/arch/x86/Makefile.inc
index c0bc852..ea6e3ec 100644
--- a/src/arch/i386/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -107,17 +107,17 @@ $(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src
 #######################################################################
 # Build the coreboot_ram (stage 2)
 
-$(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/i386/coreboot_ram.ld #ldoptions
+$(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld #ldoptions
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/i386/coreboot_ram.ld $(obj)/coreboot_ram.o
+	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/coreboot_ram.ld $(obj)/coreboot_ram.o
 	$(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
 	$(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ram.debug
 	$(OBJCOPY) --strip-debug $@
 	$(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ram.debug $@
 
-$(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.ramstage.o $$(driver-objs) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
+$(obj)/coreboot_ram.o: $(obj)/arch/x86/lib/c_start.ramstage.o $$(driver-objs) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.ramstage.o $(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group
+	$(CC) -nostdlib -r -o $@ $(obj)/arch/x86/lib/c_start.ramstage.o $(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group
 
 $(obj)/coreboot.a: $$(ramstage-objs)
 	@printf "    AR         $(subst $(obj)/,,$(@))\n"
@@ -131,7 +131,7 @@ ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
 
 $(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/i386/init/ldscript_apc.lb $^
+	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $^
 	$(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ap.debug
 	$(OBJCOPY) --strip-debug $@
 	$(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ap.debug $@
@@ -143,9 +143,9 @@ endif
 #######################################################################
 # done
 
-crt0s = $(src)/arch/i386/init/prologue.inc
+crt0s = $(src)/arch/x86/init/prologue.inc
 ldscripts =
-ldscripts += $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscripts += $(src)/arch/x86/init/ldscript_fallback_cbfs.lb
 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 crt0s += $(src)/cpu/x86/16bit/entry16.inc
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -155,8 +155,8 @@ ldscripts += $(src)/cpu/x86/32bit/entry32.lds
 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 ldscripts += $(src)/cpu/x86/16bit/reset16.lds
-crt0s += $(src)/arch/i386/lib/id.inc
-ldscripts += $(src)/arch/i386/lib/id.lds
+crt0s += $(src)/arch/x86/lib/id.inc
+ldscripts += $(src)/arch/x86/lib/id.lds
 endif
 
 crt0s += $(src)/cpu/x86/fpu_enable.inc
@@ -174,7 +174,7 @@ crt0s += $(src)/cpu/intel/car/cache_as_ram.inc
 endif
 
 ifeq ($(CONFIG_LLSHELL),y)
-crt0s += $(src)/arch/i386/llshell/llshell.inc
+crt0s += $(src)/arch/x86/llshell/llshell.inc
 endif
 
 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
@@ -192,7 +192,7 @@ ldscripts += $(chipset_bootblock_lds)
 endif
 
 ifeq ($(CONFIG_ROMCC),y)
-crt0s += $(src)/arch/i386/init/crt0_romcc_epilogue.inc
+crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
 endif
 
 ifeq ($(CONFIG_ROMCC),y)
@@ -251,7 +251,7 @@ ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
 endif
 
 ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
-include $(src)/arch/i386/Makefile.bootblock.inc
+include $(src)/arch/x86/Makefile.bootblock.inc
 else
-include $(src)/arch/i386/Makefile.bigbootblock.inc
+include $(src)/arch/x86/Makefile.bigbootblock.inc
 endif
diff --git a/src/arch/i386/acpi/debug.asl b/src/arch/x86/acpi/debug.asl
index bd5c965..bd5c965 100644
--- a/src/arch/i386/acpi/debug.asl
+++ b/src/arch/x86/acpi/debug.asl
diff --git a/src/arch/i386/acpi/globutil.asl b/src/arch/x86/acpi/globutil.asl
index 7e7f4e1..7e7f4e1 100644
--- a/src/arch/i386/acpi/globutil.asl
+++ b/src/arch/x86/acpi/globutil.asl
diff --git a/src/arch/i386/acpi/statdef.asl b/src/arch/x86/acpi/statdef.asl
index 12a5932..12a5932 100644
--- a/src/arch/i386/acpi/statdef.asl
+++ b/src/arch/x86/acpi/statdef.asl
diff --git a/src/arch/i386/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc
index 1ae32e4..d4a377f 100644
--- a/src/arch/i386/boot/Makefile.inc
+++ b/src/arch/x86/boot/Makefile.inc
@@ -9,5 +9,5 @@ ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c
 ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpigen.c
 ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
 
-$(obj)/arch/i386/boot/coreboot_table.ramstage.o : $(OPTION_TABLE_H)
+$(obj)/arch/x86/boot/coreboot_table.ramstage.o : $(OPTION_TABLE_H)
 
diff --git a/src/arch/i386/boot/acpi.c b/src/arch/x86/boot/acpi.c
index 957ec45..957ec45 100644
--- a/src/arch/i386/boot/acpi.c
+++ b/src/arch/x86/boot/acpi.c
diff --git a/src/arch/i386/boot/acpigen.c b/src/arch/x86/boot/acpigen.c
index e8cd724..e8cd724 100644
--- a/src/arch/i386/boot/acpigen.c
+++ b/src/arch/x86/boot/acpigen.c
diff --git a/src/arch/i386/boot/boot.c b/src/arch/x86/boot/boot.c
index d9cb02e..d9cb02e 100644
--- a/src/arch/i386/boot/boot.c
+++ b/src/arch/x86/boot/boot.c
diff --git a/src/arch/i386/boot/coreboot_table.c b/src/arch/x86/boot/coreboot_table.c
index 484340c..484340c 100644
--- a/src/arch/i386/boot/coreboot_table.c
+++ b/src/arch/x86/boot/coreboot_table.c
diff --git a/src/arch/i386/boot/gdt.c b/src/arch/x86/boot/gdt.c
index b425ade..b425ade 100644
--- a/src/arch/i386/boot/gdt.c
+++ b/src/arch/x86/boot/gdt.c
diff --git a/src/arch/i386/boot/mpspec.c b/src/arch/x86/boot/mpspec.c
index 70bc540..70bc540 100644
--- a/src/arch/i386/boot/mpspec.c
+++ b/src/arch/x86/boot/mpspec.c
diff --git a/src/arch/i386/boot/multiboot.c b/src/arch/x86/boot/multiboot.c
index 4059f27..4059f27 100644
--- a/src/arch/i386/boot/multiboot.c
+++ b/src/arch/x86/boot/multiboot.c
diff --git a/src/arch/i386/boot/pirq_routing.c b/src/arch/x86/boot/pirq_routing.c
index bb8a7b6..bb8a7b6 100644
--- a/src/arch/i386/boot/pirq_routing.c
+++ b/src/arch/x86/boot/pirq_routing.c
diff --git a/src/arch/i386/boot/tables.c b/src/arch/x86/boot/tables.c
index d816e76..d816e76 100644
--- a/src/arch/i386/boot/tables.c
+++ b/src/arch/x86/boot/tables.c
diff --git a/src/arch/i386/boot/wakeup.S b/src/arch/x86/boot/wakeup.S
index a1df4d5..a1df4d5 100644
--- a/src/arch/i386/boot/wakeup.S
+++ b/src/arch/x86/boot/wakeup.S
diff --git a/src/arch/i386/coreboot_ram.ld b/src/arch/x86/coreboot_ram.ld
index 57ddd03..57ddd03 100644
--- a/src/arch/i386/coreboot_ram.ld
+++ b/src/arch/x86/coreboot_ram.ld
diff --git a/src/arch/i386/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h
index 030745d..030745d 100644
--- a/src/arch/i386/include/arch/acpi.h
+++ b/src/arch/x86/include/arch/acpi.h
diff --git a/src/arch/i386/include/arch/acpigen.h b/src/arch/x86/include/arch/acpigen.h
index 6f13a7a..6f13a7a 100644
--- a/src/arch/i386/include/arch/acpigen.h
+++ b/src/arch/x86/include/arch/acpigen.h
diff --git a/src/arch/i386/include/arch/boot/boot.h b/src/arch/x86/include/arch/boot/boot.h
index 3ff51c3..3ff51c3 100644
--- a/src/arch/i386/include/arch/boot/boot.h
+++ b/src/arch/x86/include/arch/boot/boot.h
diff --git a/src/arch/i386/include/arch/byteorder.h b/src/arch/x86/include/arch/byteorder.h
index ab344e6..ab344e6 100644
--- a/src/arch/i386/include/arch/byteorder.h
+++ b/src/arch/x86/include/arch/byteorder.h
diff --git a/src/arch/i386/include/arch/coreboot_tables.h b/src/arch/x86/include/arch/coreboot_tables.h
index 3c9bf98..3c9bf98 100644
--- a/src/arch/i386/include/arch/coreboot_tables.h
+++ b/src/arch/x86/include/arch/coreboot_tables.h
diff --git a/src/arch/i386/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 4d7be86..4d7be86 100644
--- a/src/arch/i386/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
diff --git a/src/arch/i386/include/arch/hlt.h b/src/arch/x86/include/arch/hlt.h
index ddfe169..ddfe169 100644
--- a/src/arch/i386/include/arch/hlt.h
+++ b/src/arch/x86/include/arch/hlt.h
diff --git a/src/arch/i386/include/arch/interrupt.h b/src/arch/x86/include/arch/interrupt.h
index 2d2330b..2d2330b 100644
--- a/src/arch/i386/include/arch/interrupt.h
+++ b/src/arch/x86/include/arch/interrupt.h
diff --git a/src/arch/i386/include/arch/io.h b/src/arch/x86/include/arch/io.h
index aad8408..aad8408 100644
--- a/src/arch/i386/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
diff --git a/src/arch/i386/include/arch/ioapic.h b/src/arch/x86/include/arch/ioapic.h
index 623f617..623f617 100644
--- a/src/arch/i386/include/arch/ioapic.h
+++ b/src/arch/x86/include/arch/ioapic.h
diff --git a/src/arch/i386/include/arch/llshell.h b/src/arch/x86/include/arch/llshell.h
index 556df7d..556df7d 100644
--- a/src/arch/i386/include/arch/llshell.h
+++ b/src/arch/x86/include/arch/llshell.h
diff --git a/src/arch/i386/include/arch/mmio_conf.h b/src/arch/x86/include/arch/mmio_conf.h
index 08962f0..08962f0 100644
--- a/src/arch/i386/include/arch/mmio_conf.h
+++ b/src/arch/x86/include/arch/mmio_conf.h
diff --git a/src/arch/i386/include/arch/pci_ops.h b/src/arch/x86/include/arch/pci_ops.h
index 9c4e029..9c4e029 100644
--- a/src/arch/i386/include/arch/pci_ops.h
+++ b/src/arch/x86/include/arch/pci_ops.h
diff --git a/src/arch/i386/include/arch/pciconf.h b/src/arch/x86/include/arch/pciconf.h
index a356935..a356935 100644
--- a/src/arch/i386/include/arch/pciconf.h
+++ b/src/arch/x86/include/arch/pciconf.h
diff --git a/src/arch/i386/include/arch/pirq_routing.h b/src/arch/x86/include/arch/pirq_routing.h
index 0b65eac..0b65eac 100644
--- a/src/arch/i386/include/arch/pirq_routing.h
+++ b/src/arch/x86/include/arch/pirq_routing.h
diff --git a/src/arch/i386/include/arch/registers.h b/src/arch/x86/include/arch/registers.h
index bc1b681..bc1b681 100644
--- a/src/arch/i386/include/arch/registers.h
+++ b/src/arch/x86/include/arch/registers.h
diff --git a/src/arch/i386/include/arch/rom_segs.h b/src/arch/x86/include/arch/rom_segs.h
index 8c00eb3..8c00eb3 100644
--- a/src/arch/i386/include/arch/rom_segs.h
+++ b/src/arch/x86/include/arch/rom_segs.h
diff --git a/src/arch/i386/include/arch/romcc_io.h b/src/arch/x86/include/arch/romcc_io.h
index 79ea265..79ea265 100644
--- a/src/arch/i386/include/arch/romcc_io.h
+++ b/src/arch/x86/include/arch/romcc_io.h
diff --git a/src/arch/i386/include/arch/smp/atomic.h b/src/arch/x86/include/arch/smp/atomic.h
index 18bbae2..18bbae2 100644
--- a/src/arch/i386/include/arch/smp/atomic.h
+++ b/src/arch/x86/include/arch/smp/atomic.h
diff --git a/src/arch/i386/include/arch/smp/mpspec.h b/src/arch/x86/include/arch/smp/mpspec.h
index bc09f48..bc09f48 100644
--- a/src/arch/i386/include/arch/smp/mpspec.h
+++ b/src/arch/x86/include/arch/smp/mpspec.h
diff --git a/src/arch/i386/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h
index 5c1dd94..5c1dd94 100644
--- a/src/arch/i386/include/arch/smp/spinlock.h
+++ b/src/arch/x86/include/arch/smp/spinlock.h
diff --git a/src/arch/i386/include/arch/stages.h b/src/arch/x86/include/arch/stages.h
index 00d2a93..00d2a93 100644
--- a/src/arch/i386/include/arch/stages.h
+++ b/src/arch/x86/include/arch/stages.h
diff --git a/src/arch/i386/include/bitops.h b/src/arch/x86/include/bitops.h
index 9206465..9206465 100644
--- a/src/arch/i386/include/bitops.h
+++ b/src/arch/x86/include/bitops.h
diff --git a/src/arch/i386/include/bootblock_common.h b/src/arch/x86/include/bootblock_common.h
index 895a185..895a185 100644
--- a/src/arch/i386/include/bootblock_common.h
+++ b/src/arch/x86/include/bootblock_common.h
diff --git a/src/arch/i386/include/div64.h b/src/arch/x86/include/div64.h
index 3634f6d..3634f6d 100644
--- a/src/arch/i386/include/div64.h
+++ b/src/arch/x86/include/div64.h
diff --git a/src/arch/i386/include/stddef.h b/src/arch/x86/include/stddef.h
index e4fc019..e4fc019 100644
--- a/src/arch/i386/include/stddef.h
+++ b/src/arch/x86/include/stddef.h
diff --git a/src/arch/i386/include/stdint.h b/src/arch/x86/include/stdint.h
index b393cc1..b393cc1 100644
--- a/src/arch/i386/include/stdint.h
+++ b/src/arch/x86/include/stdint.h
diff --git a/src/arch/x86/init/Makefile.inc b/src/arch/x86/init/Makefile.inc
new file mode 100644
index 0000000..263c58e
--- /dev/null
+++ b/src/arch/x86/init/Makefile.inc
@@ -0,0 +1 @@
+# If you add something to this file, enable it in src/arch/x86/Makefile.inc first.
diff --git a/src/arch/i386/init/bootblock_normal.c b/src/arch/x86/init/bootblock_normal.c
index 08651c3..08651c3 100644
--- a/src/arch/i386/init/bootblock_normal.c
+++ b/src/arch/x86/init/bootblock_normal.c
diff --git a/src/arch/i386/init/bootblock_simple.c b/src/arch/x86/init/bootblock_simple.c
index e8994ee..e8994ee 100644
--- a/src/arch/i386/init/bootblock_simple.c
+++ b/src/arch/x86/init/bootblock_simple.c
diff --git a/src/arch/i386/init/crt0_romcc_epilogue.inc b/src/arch/x86/init/crt0_romcc_epilogue.inc
index 3bd1b36..3bd1b36 100644
--- a/src/arch/i386/init/crt0_romcc_epilogue.inc
+++ b/src/arch/x86/init/crt0_romcc_epilogue.inc
diff --git a/src/arch/i386/init/entry.S b/src/arch/x86/init/entry.S
index af29296..af29296 100644
--- a/src/arch/i386/init/entry.S
+++ b/src/arch/x86/init/entry.S
diff --git a/src/arch/i386/init/ldscript.ld b/src/arch/x86/init/ldscript.ld
index 149f048..149f048 100644
--- a/src/arch/i386/init/ldscript.ld
+++ b/src/arch/x86/init/ldscript.ld
diff --git a/src/arch/i386/init/ldscript_apc.lb b/src/arch/x86/init/ldscript_apc.lb
index 789a168..789a168 100644
--- a/src/arch/i386/init/ldscript_apc.lb
+++ b/src/arch/x86/init/ldscript_apc.lb
diff --git a/src/arch/i386/init/ldscript_failover.lb b/src/arch/x86/init/ldscript_failover.lb
index 7e48dc1..7e48dc1 100644
--- a/src/arch/i386/init/ldscript_failover.lb
+++ b/src/arch/x86/init/ldscript_failover.lb
diff --git a/src/arch/i386/init/ldscript_fallback_cbfs.lb b/src/arch/x86/init/ldscript_fallback_cbfs.lb
index 480fd32..480fd32 100644
--- a/src/arch/i386/init/ldscript_fallback_cbfs.lb
+++ b/src/arch/x86/init/ldscript_fallback_cbfs.lb
diff --git a/src/arch/i386/init/prologue.inc b/src/arch/x86/init/prologue.inc
index 8947f20..8947f20 100644
--- a/src/arch/i386/init/prologue.inc
+++ b/src/arch/x86/init/prologue.inc
diff --git a/src/arch/i386/lib/Makefile.inc b/src/arch/x86/lib/Makefile.inc
index 7660d4c..43ac469 100644
--- a/src/arch/i386/lib/Makefile.inc
+++ b/src/arch/x86/lib/Makefile.inc
@@ -10,4 +10,4 @@ ramstage-$(CONFIG_IOAPIC) += ioapic.c
 romstage-y += printk_init.c
 romstage-y += cbfs_and_run.c
 
-$(obj)/arch/i386/lib/console.ramstage.o :: $(obj)/build.h
+$(obj)/arch/x86/lib/console.ramstage.o :: $(obj)/build.h
diff --git a/src/arch/i386/lib/c_start.S b/src/arch/x86/lib/c_start.S
index 94ce4a7..94ce4a7 100644
--- a/src/arch/i386/lib/c_start.S
+++ b/src/arch/x86/lib/c_start.S
diff --git a/src/arch/i386/lib/cbfs_and_run.c b/src/arch/x86/lib/cbfs_and_run.c
index 5e3d8fe..5e3d8fe 100644
--- a/src/arch/i386/lib/cbfs_and_run.c
+++ b/src/arch/x86/lib/cbfs_and_run.c
diff --git a/src/arch/i386/lib/cpu.c b/src/arch/x86/lib/cpu.c
index 3732ae2..3732ae2 100644
--- a/src/arch/i386/lib/cpu.c
+++ b/src/arch/x86/lib/cpu.c
diff --git a/src/arch/i386/lib/exception.c b/src/arch/x86/lib/exception.c
index 20917b6..20917b6 100644
--- a/src/arch/i386/lib/exception.c
+++ b/src/arch/x86/lib/exception.c
diff --git a/src/arch/i386/lib/id.inc b/src/arch/x86/lib/id.inc
index 443dbad..443dbad 100644
--- a/src/arch/i386/lib/id.inc
+++ b/src/arch/x86/lib/id.inc
diff --git a/src/arch/i386/lib/id.lds b/src/arch/x86/lib/id.lds
index d646270..d646270 100644
--- a/src/arch/i386/lib/id.lds
+++ b/src/arch/x86/lib/id.lds
diff --git a/src/arch/i386/lib/ioapic.c b/src/arch/x86/lib/ioapic.c
index e39fe8f..e39fe8f 100644
--- a/src/arch/i386/lib/ioapic.c
+++ b/src/arch/x86/lib/ioapic.c
diff --git a/src/arch/i386/lib/pci_ops_auto.c b/src/arch/x86/lib/pci_ops_auto.c
index 92eedd3..92eedd3 100644
--- a/src/arch/i386/lib/pci_ops_auto.c
+++ b/src/arch/x86/lib/pci_ops_auto.c
diff --git a/src/arch/i386/lib/pci_ops_conf1.c b/src/arch/x86/lib/pci_ops_conf1.c
index 36db54c..36db54c 100644
--- a/src/arch/i386/lib/pci_ops_conf1.c
+++ b/src/arch/x86/lib/pci_ops_conf1.c
diff --git a/src/arch/i386/lib/pci_ops_conf2.c b/src/arch/x86/lib/pci_ops_conf2.c
index 839f5b4..839f5b4 100644
--- a/src/arch/i386/lib/pci_ops_conf2.c
+++ b/src/arch/x86/lib/pci_ops_conf2.c
diff --git a/src/arch/i386/lib/pci_ops_mmconf.c b/src/arch/x86/lib/pci_ops_mmconf.c
index 7d8fb32..7d8fb32 100644
--- a/src/arch/i386/lib/pci_ops_mmconf.c
+++ b/src/arch/x86/lib/pci_ops_mmconf.c
diff --git a/src/arch/i386/lib/printk_init.c b/src/arch/x86/lib/printk_init.c
index 2f7f751..2f7f751 100644
--- a/src/arch/i386/lib/printk_init.c
+++ b/src/arch/x86/lib/printk_init.c
diff --git a/src/arch/i386/lib/stages.c b/src/arch/x86/lib/stages.c
index a6a232a..a6a232a 100644
--- a/src/arch/i386/lib/stages.c
+++ b/src/arch/x86/lib/stages.c
diff --git a/src/arch/i386/lib/walkcbfs.S b/src/arch/x86/lib/walkcbfs.S
index 395c46e..395c46e 100644
--- a/src/arch/i386/lib/walkcbfs.S
+++ b/src/arch/x86/lib/walkcbfs.S
diff --git a/src/arch/i386/llshell/console.inc b/src/arch/x86/llshell/console.inc
index 84f62e3..84f62e3 100644
--- a/src/arch/i386/llshell/console.inc
+++ b/src/arch/x86/llshell/console.inc
diff --git a/src/arch/i386/llshell/llshell.inc b/src/arch/x86/llshell/llshell.inc
index a66ac15..a66ac15 100644
--- a/src/arch/i386/llshell/llshell.inc
+++ b/src/arch/x86/llshell/llshell.inc
diff --git a/src/arch/i386/llshell/pci.inc b/src/arch/x86/llshell/pci.inc
index 7cb7410..7cb7410 100644
--- a/src/arch/i386/llshell/pci.inc
+++ b/src/arch/x86/llshell/pci.inc
diff --git a/src/arch/i386/llshell/ramtest.inc b/src/arch/x86/llshell/ramtest.inc
index c02cf45..c02cf45 100644
--- a/src/arch/i386/llshell/ramtest.inc
+++ b/src/arch/x86/llshell/ramtest.inc
diff --git a/src/arch/i386/llshell/readme.coreboot b/src/arch/x86/llshell/readme.coreboot
index ae7dcbe..ae7dcbe 100644
--- a/src/arch/i386/llshell/readme.coreboot
+++ b/src/arch/x86/llshell/readme.coreboot
diff --git a/src/cpu/via/model_c7/model_c7_init.c b/src/cpu/via/model_c7/model_c7_init.c
index 68b5ed0..bc32616 100644
--- a/src/cpu/via/model_c7/model_c7_init.c
+++ b/src/cpu/via/model_c7/model_c7_init.c
@@ -213,7 +213,7 @@ static struct device_operations cpu_dev_ops = {
 	.init = model_c7_init,
 };
 
-/* Look in arch/i386/lib/cpu.c:cpu_initialize. If there is no CPU with an exact
+/* Look in arch/x86/lib/cpu.c:cpu_initialize. If there is no CPU with an exact
  * ID, the cpu mask (stepping) is masked out and the check is repeated. This
  * allows us to keep the table significantly smaller.
  */
diff --git a/src/include/lib.h b/src/include/lib.h
index 2a2b73a..424f653 100644
--- a/src/include/lib.h
+++ b/src/include/lib.h
@@ -32,7 +32,7 @@ unsigned long log2(unsigned long x);
 /* Defined in src/lib/lzma.c */
 unsigned long ulzma(unsigned char *src, unsigned char *dst);
 
-/* Defined in src/arch/i386/boot/gdt.c */
+/* Defined in src/arch/x86/boot/gdt.c */
 void move_gdt(void);
 
 /* Defined in src/lib/ramtest.c */
diff --git a/src/mainboard/amd/dbm690t/dsdt.asl b/src/mainboard/amd/dbm690t/dsdt.asl
index 30c6e94..1b24e18 100644
--- a/src/mainboard/amd/dbm690t/dsdt.asl
+++ b/src/mainboard/amd/dbm690t/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
 	/* FIXME the patching is not done yet! */
@@ -1123,7 +1123,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/amd/mahogany/dsdt.asl b/src/mainboard/amd/mahogany/dsdt.asl
index 9c46930..33c4620 100644
--- a/src/mainboard/amd/mahogany/dsdt.asl
+++ b/src/mainboard/amd/mahogany/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
 	/* FIXME the patching is not done yet! */
@@ -1120,7 +1120,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/amd/mahogany_fam10/dsdt.asl b/src/mainboard/amd/mahogany_fam10/dsdt.asl
index e14467d..692699d 100644
--- a/src/mainboard/amd/mahogany_fam10/dsdt.asl
+++ b/src/mainboard/amd/mahogany_fam10/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
 	/* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/amd/pistachio/dsdt.asl b/src/mainboard/amd/pistachio/dsdt.asl
index dfdf463..bd5f73e 100644
--- a/src/mainboard/amd/pistachio/dsdt.asl
+++ b/src/mainboard/amd/pistachio/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
 	/* FIXME the patching is not done yet! */
@@ -1122,7 +1122,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/amd/serengeti_cheetah/ap_romstage.c b/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
index 6b0a685..b3d375e 100644
--- a/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
@@ -12,7 +12,7 @@
 #include <cpu/x86/lapic.h>
 #include <pc80/mc146818rtc.h>
 #include "pc80/serial.c"
-#include "./arch/i386/lib/printk_init.c"
+#include "./arch/x86/lib/printk_init.c"
 
 #include "console/console.c"
 #include "lib/uart8250.c"
diff --git a/src/mainboard/amd/tilapia_fam10/dsdt.asl b/src/mainboard/amd/tilapia_fam10/dsdt.asl
index d3f06d3..3170a0b 100644
--- a/src/mainboard/amd/tilapia_fam10/dsdt.asl
+++ b/src/mainboard/amd/tilapia_fam10/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
 	/* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/asrock/939a785gmh/dsdt.asl b/src/mainboard/asrock/939a785gmh/dsdt.asl
index 027bd8d..70fca4d 100644
--- a/src/mainboard/asrock/939a785gmh/dsdt.asl
+++ b/src/mainboard/asrock/939a785gmh/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 	#include "northbridge/amd/amdk8/util.asl"
 
 	Name(HPBA, 0xFED00000)	/* Base address of HPET table */
@@ -460,7 +460,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/asus/m4a78-em/dsdt.asl b/src/mainboard/asus/m4a78-em/dsdt.asl
index d3f06d3..3170a0b 100644
--- a/src/mainboard/asus/m4a78-em/dsdt.asl
+++ b/src/mainboard/asus/m4a78-em/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
 	/* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/asus/m4a785-m/dsdt.asl b/src/mainboard/asus/m4a785-m/dsdt.asl
index d3f06d3..3170a0b 100644
--- a/src/mainboard/asus/m4a785-m/dsdt.asl
+++ b/src/mainboard/asus/m4a785-m/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
 	/* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/dell/s1850/romstage.c b/src/mainboard/dell/s1850/romstage.c
index b43be37..0a051d2 100644
--- a/src/mainboard/dell/s1850/romstage.c
+++ b/src/mainboard/dell/s1850/romstage.c
@@ -142,7 +142,7 @@ static inline void bmc_foad(void)
 
 /* end IPMI garbage */
 
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
index ef2b0f2..88b7ca1 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
@@ -37,7 +37,7 @@
 #include "pc80/serial.c"
 
 #include "lib/uart8250.c"
-#include "arch/i386/lib/printk_init.c"
+#include "arch/x86/lib/printk_init.c"
 #include "console/vtxprintf.c"
 #include "console/console.c"
 
diff --git a/src/mainboard/gigabyte/m57sli/ap_romstage.c b/src/mainboard/gigabyte/m57sli/ap_romstage.c
index 40a13da..ff3ac11 100644
--- a/src/mainboard/gigabyte/m57sli/ap_romstage.c
+++ b/src/mainboard/gigabyte/m57sli/ap_romstage.c
@@ -35,7 +35,7 @@
 #include "pc80/serial.c"
 
 #include "lib/uart8250.c"
-#include "arch/i386/lib/printk_init.c"
+#include "arch/x86/lib/printk_init.c"
 #include "console/vtxprintf.c"
 #include "console/console.c"
 
diff --git a/src/mainboard/gigabyte/ma785gmt/dsdt.asl b/src/mainboard/gigabyte/ma785gmt/dsdt.asl
index 1321e38..608513d 100644
--- a/src/mainboard/gigabyte/ma785gmt/dsdt.asl
+++ b/src/mainboard/gigabyte/ma785gmt/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
 	/* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/gigabyte/ma78gm/dsdt.asl b/src/mainboard/gigabyte/ma78gm/dsdt.asl
index aeb8c0a..03d8fcd 100644
--- a/src/mainboard/gigabyte/ma78gm/dsdt.asl
+++ b/src/mainboard/gigabyte/ma78gm/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
 	/* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/iei/kino-780am2-fam10/dsdt.asl b/src/mainboard/iei/kino-780am2-fam10/dsdt.asl
index e613b99..8dd0e21 100644
--- a/src/mainboard/iei/kino-780am2-fam10/dsdt.asl
+++ b/src/mainboard/iei/kino-780am2-fam10/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
 	/* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index c6fbc32..b816775 100644
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -37,7 +37,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
 #include "debug.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {
diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index 68e94ec..f1e7676 100644
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -50,7 +50,7 @@ static inline int spd_read_byte(u16 device, u8 address)
 #include "northbridge/intel/i3100/raminit.c"
 #include "lib/generic_sdram.c"
 #if 0 /* skip_romstage doesn't compile with gcc */
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 #endif
 
 void main(unsigned long bist)
diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index f57c36b..af7d1bf 100644
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -48,7 +48,7 @@ static inline int spd_read_byte(u16 device, u8 address)
 #include "northbridge/intel/i3100/raminit_ep80579.c"
 #include "lib/generic_sdram.c"
 #include "../../intel/jarrell/debug.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 #define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1)
 
diff --git a/src/mainboard/intel/xe7501devkit/irq_tables.c b/src/mainboard/intel/xe7501devkit/irq_tables.c
index 951b08f..f3c1c8e 100644
--- a/src/mainboard/intel/xe7501devkit/irq_tables.c
+++ b/src/mainboard/intel/xe7501devkit/irq_tables.c
@@ -31,7 +31,7 @@ const struct irq_routing_table intel_irq_routing_table = {
 	0xB1,      								// Checksum of the entire structure (causes 8-bit sum == 0)
 	{
 		// NOTE: For 82801, a nonzero link value is a pointer to a PIRQ[n]_ROUT register in PCI configuration space
-		//		 This was determined from linux-2.6.11/arch/i386/pci/irq.c
+		//		 This was determined from linux-2.6.11/arch/x86/pci/irq.c
 		// bitmap of 0xdcf8 == routable to IRQ3-IRQ7, IRQ10-IRQ12, or IRQ14-IRQ15
 		// ICH-3 doesn't allow SERIRQ or PCI message to generate IRQ0, IRQ2, IRQ8, or IRQ13
 		// Not sure why IRQ9 isn't routable (inherited from Tyan S2735)
diff --git a/src/mainboard/jetway/pa78vm5/dsdt.asl b/src/mainboard/jetway/pa78vm5/dsdt.asl
index 8b20ee0..38de9b9 100644
--- a/src/mainboard/jetway/pa78vm5/dsdt.asl
+++ b/src/mainboard/jetway/pa78vm5/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
 	/* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/kontron/kt690/dsdt.asl b/src/mainboard/kontron/kt690/dsdt.asl
index 4d320b3..20ecb5b 100644
--- a/src/mainboard/kontron/kt690/dsdt.asl
+++ b/src/mainboard/kontron/kt690/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
 	/* FIXME the patching is not done yet! */
@@ -1123,7 +1123,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/nokia/ip530/irq_tables.c b/src/mainboard/nokia/ip530/irq_tables.c
index d5f4cb4..21c8805 100644
--- a/src/mainboard/nokia/ip530/irq_tables.c
+++ b/src/mainboard/nokia/ip530/irq_tables.c
@@ -81,7 +81,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
 /**
  * TODO: This stub function is here until the point is solved in the
- * main code of coreboot. see also arch/i386/boot/pirq_tables.c
+ * main code of coreboot. see also arch/x86/boot/pirq_tables.c
  */
 void pirq_assign_irqs(const unsigned char pIntAtoD[4])
 {
diff --git a/src/mainboard/nvidia/l1_2pvv/ap_romstage.c b/src/mainboard/nvidia/l1_2pvv/ap_romstage.c
index dbb626b..6efcb98 100644
--- a/src/mainboard/nvidia/l1_2pvv/ap_romstage.c
+++ b/src/mainboard/nvidia/l1_2pvv/ap_romstage.c
@@ -35,7 +35,7 @@
 #include "pc80/serial.c"
 
 #include "lib/uart8250.c"
-#include "arch/i386/lib/printk_init.c"
+#include "arch/x86/lib/printk_init.c"
 #include "console/vtxprintf.c"
 #include "console/console.c"
 
diff --git a/src/mainboard/supermicro/h8dme/ap_romstage.c b/src/mainboard/supermicro/h8dme/ap_romstage.c
index da4180b..9b3f9c8 100644
--- a/src/mainboard/supermicro/h8dme/ap_romstage.c
+++ b/src/mainboard/supermicro/h8dme/ap_romstage.c
@@ -37,7 +37,7 @@
 #include "console/console.c"
 #include "lib/uart8250.c"
 #include "console/vtxprintf.c"
-#include "./arch/i386/lib/printk_init.c"
+#include "./arch/x86/lib/printk_init.c"
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
diff --git a/src/mainboard/supermicro/h8dmr/ap_romstage.c b/src/mainboard/supermicro/h8dmr/ap_romstage.c
index da4180b..9b3f9c8 100644
--- a/src/mainboard/supermicro/h8dmr/ap_romstage.c
+++ b/src/mainboard/supermicro/h8dmr/ap_romstage.c
@@ -37,7 +37,7 @@
 #include "console/console.c"
 #include "lib/uart8250.c"
 #include "console/vtxprintf.c"
-#include "./arch/i386/lib/printk_init.c"
+#include "./arch/x86/lib/printk_init.c"
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
diff --git a/src/mainboard/supermicro/x6dai_g/romstage.c b/src/mainboard/supermicro/x6dai_g/romstage.c
index 01484c8..87992cc 100644
--- a/src/mainboard/supermicro/x6dai_g/romstage.c
+++ b/src/mainboard/supermicro/x6dai_g/romstage.c
@@ -41,7 +41,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/intel/e7525/raminit.c"
 #include "lib/generic_sdram.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {
diff --git a/src/mainboard/supermicro/x6dhe_g/romstage.c b/src/mainboard/supermicro/x6dhe_g/romstage.c
index 4068985..2fb9f22 100644
--- a/src/mainboard/supermicro/x6dhe_g/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g/romstage.c
@@ -45,7 +45,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {
diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c
index b8fc164..177abb4 100644
--- a/src/mainboard/supermicro/x6dhe_g2/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c
@@ -42,7 +42,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {
diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c
index 13226f3..e85ea5a 100644
--- a/src/mainboard/supermicro/x6dhr_ig/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c
@@ -44,7 +44,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {
diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
index 82aa6c9..91e96a0 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
@@ -44,7 +44,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {
diff --git a/src/mainboard/technexion/tim5690/dsdt.asl b/src/mainboard/technexion/tim5690/dsdt.asl
index ad900ab..409d941 100644
--- a/src/mainboard/technexion/tim5690/dsdt.asl
+++ b/src/mainboard/technexion/tim5690/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
 	/* FIXME the patching is not done yet! */
@@ -1123,7 +1123,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/technexion/tim8690/dsdt.asl b/src/mainboard/technexion/tim8690/dsdt.asl
index fb26e6d..5fd3e3e 100644
--- a/src/mainboard/technexion/tim8690/dsdt.asl
+++ b/src/mainboard/technexion/tim8690/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
 	0x00010001	/* OEM Revision */
 	)
 {	/* Start of ASL file */
-	/* #include "../../../arch/i386/acpi/debug.asl" */		/* Include global debug methods if needed */
+	/* #include "../../../arch/x86/acpi/debug.asl" */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
 	/* FIXME the patching is not done yet! */
@@ -1123,7 +1123,7 @@ DefinitionBlock (
 
 	/* South Bridge */
 	Scope(\_SB) { /* Start \_SB scope */
-		#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+		#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c
index 1040a12..84d4035 100644
--- a/src/mainboard/via/epia-m700/romstage.c
+++ b/src/mainboard/via/epia-m700/romstage.c
@@ -424,7 +424,7 @@ void main(unsigned long bist)
 
 	/*
 	 * There are two function definitions of console_init(), while the
-	 * src/arch/i386/lib is the right one.
+	 * src/arch/x86/lib is the right one.
 	 */
 	console_init();
 
diff --git a/src/mainboard/via/epia-m700/wakeup.c b/src/mainboard/via/epia-m700/wakeup.c
index bae0fd4..f904dc2 100644
--- a/src/mainboard/via/epia-m700/wakeup.c
+++ b/src/mainboard/via/epia-m700/wakeup.c
@@ -323,7 +323,7 @@ void acpi_jump_wake(u32 vector)
  * ----------------------------------------------------------------------- */
 
 /*
- * arch/i386/boot/a20.c
+ * arch/x86/boot/a20.c
  *
  * Enable A20 gate (return -1 on failure)
  */
diff --git a/src/northbridge/amd/amdfam10/acpi.c b/src/northbridge/amd/amdfam10/acpi.c
index 7e57cce..7929427 100644
--- a/src/northbridge/amd/amdfam10/acpi.c
+++ b/src/northbridge/amd/amdfam10/acpi.c
@@ -26,7 +26,7 @@
 #include <cpu/amd/amdfam10_sysconf.h>
 #include "amdfam10.h"
 
-//it seems some functions can be moved arch/i386/boot/acpi.c
+//it seems some functions can be moved arch/x86/boot/acpi.c
 
 unsigned long acpi_create_madt_lapic_nmis(unsigned long current, u16 flags, u8 lint)
 {
diff --git a/src/northbridge/amd/amdk8/acpi.c b/src/northbridge/amd/amdk8/acpi.c
index 7a5d1c2..ba04da3 100644
--- a/src/northbridge/amd/amdk8/acpi.c
+++ b/src/northbridge/amd/amdk8/acpi.c
@@ -33,7 +33,7 @@
 #include <cpu/amd/amdk8_sysconf.h>
 #include "acpi.h"
 
-//it seems some functions can be moved arch/i386/boot/acpi.c
+//it seems some functions can be moved arch/x86/boot/acpi.c
 
 unsigned long acpi_create_madt_lapic_nmis(unsigned long current, u16 flags, u8 lint)
 {