summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDuncan Laurie <dlaurie@chromium.org>2015-10-22 10:53:01 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-10-28 22:27:45 +0100
commitba5487acf47b3d9a8e36ec8538659bb7eb8cf7a1 (patch)
tree695a6e045c8c817c0629db6d0a231ff16d9c7f70
parentf372fb5529173817664db405055fda8895518620 (diff)
downloadcoreboot-staging-ba5487acf47b3d9a8e36ec8538659bb7eb8cf7a1.zip
coreboot-staging-ba5487acf47b3d9a8e36ec8538659bb7eb8cf7a1.tar.gz
google/chell: Set DPTF critical temperature to 99C
If we boot without a heatsink then DPTF may power off the system when it starts if the CPU temp is >90C. Since TJmax is 100C set the critical threshold to just below that value. Also remove the active thresholds as chell does not have a fan. This will have DPTF use the default values but without the DPTF active policy it shouldn't get used. BUG=chrome-os-partner:46694 BRANCH=none TEST=build and boot on chell w/o a heatsink Change-Id: Id9e8f2c547468db8ad0edaf6c362a9a9bb5b95a2 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 23d9117d5d7a4b44fc2298352eba133747f8e246 Original-Change-Id: Ib8e074098e3956efeed0f9b7f8b16652658db374 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/308728 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/12202 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r--src/mainboard/google/chell/acpi/dptf.asl7
1 files changed, 1 insertions, 6 deletions
diff --git a/src/mainboard/google/chell/acpi/dptf.asl b/src/mainboard/google/chell/acpi/dptf.asl
index 77578f6..478c882 100644
--- a/src/mainboard/google/chell/acpi/dptf.asl
+++ b/src/mainboard/google/chell/acpi/dptf.asl
@@ -19,12 +19,7 @@
*/
#define DPTF_CPU_PASSIVE 80
-#define DPTF_CPU_CRITICAL 90
-#define DPTF_CPU_ACTIVE_AC0 90
-#define DPTF_CPU_ACTIVE_AC1 80
-#define DPTF_CPU_ACTIVE_AC2 70
-#define DPTF_CPU_ACTIVE_AC3 60
-#define DPTF_CPU_ACTIVE_AC4 50
+#define DPTF_CPU_CRITICAL 99
#define DPTF_TSR0_SENSOR_ID 1
#define DPTF_TSR0_SENSOR_NAME "Ambient"
OpenPOWER on IntegriCloud