| Commit message (Collapse) | Author | Age | Files | Lines |
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All old patches are droped because:
Merged into 7.2 by upstream:
* fedora/libatomic_ops-1.2-ppclwzfix.patch
* gentoo/libatomic_ops-1.2-mips.patch
* gentoo/sh4-atomic-ops.patch
* libatomics-ops_fix_for_x32.patch
Obsolete:
* doublefix.patch
(From OE-Core rev: cf7a52c8f2b84901421c7e2cee3009fe91687a1c)
Signed-off-by: Xin Ouyang <Xin.Ouyang@windriver.com>
Signed-off-by: Saul Wold <sgw@linux.intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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(From OE-Core rev: 0023aa21687287754c972c5e8edd527822e4e7c0)
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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This Fixes bug: [YOCTO #1418]
Remove the `q' suffix on x86-64 atomic instructions.
We don't need the `q' suffix on x86_64 atomic instructions for AO_t,
which is defined as "unsigned long". "unsigned long" is 32bit for x32
and 64bit for x86-64. The register operand in x86-64 atomic instructions
is sufficient to properly determine the register size.
(From OE-Core rev: daaaeb1bd1467a2bed75722ce3ff35be970402e0)
Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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(From OE-Core rev: 66ec3774f99229ca6c25c047372f45ccd834d77a)
Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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* Added another patch from Gentoo/OE to allow package to build for
mips arches
* Added SUMMARY, HOMEPAGE, and SECTION fields
* Added source checksums
Signed-off-by: Scott Garman <scott.a.garman@intel.com>
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This is the next stage of recipe reorganization, in this stage
many recipes where moved to a new meta-demoapps layer since this
is more appropriate for demo usage then the core. Additional some
recipes were moved to meta-extras to indicate they may be depercated
at a future time.
A number of recipes were modified since dependencies need to be
corrected.
Signed-off-by: Saul Wold <Saul.Wold@intel.com>
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