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| author | Ross Burton <ross.burton@intel.com> | 2013-06-12 13:17:41 +0100 |
|---|---|---|
| committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2013-06-13 17:38:10 +0100 |
| commit | 9d39cdc28baf8e689ce69803deefc343d3117101 (patch) | |
| tree | 4f9199a2da4f9d2fb292e9b6a83b87ee2cba0ac7 /meta/site/mips-common | |
| parent | 68ffca3470a84e966e5b1d81611fc59ce9f7b76c (diff) | |
| download | ast2050-yocto-poky-9d39cdc28baf8e689ce69803deefc343d3117101.zip ast2050-yocto-poky-9d39cdc28baf8e689ce69803deefc343d3117101.tar.gz | |
site: add more alignment values for at-spi2-core
x86 and x86_64 values were added in 8c46ec. The x86-64 values were missing an
entry, add MIPS and PowerPC values from myself in qemu, and ARM values from
Martin Jansa.
(From OE-Core rev: a6a12ef5cad0dbb2d773bdccc340f1f767c5a782)
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Saul Wold <sgw@linux.intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/site/mips-common')
| -rw-r--r-- | meta/site/mips-common | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/meta/site/mips-common b/meta/site/mips-common index b4aaa7f..89d72cb 100644 --- a/meta/site/mips-common +++ b/meta/site/mips-common @@ -44,3 +44,13 @@ ac_cv_alignof_unsigned_long=4 # slrn slrn_cv_va_val_copy=${slrn_cv_va_val_copy=yes} + +# at-spi2-core +ac_cv_alignof_char=1 +ac_cv_alignof_dbind_pointer=4 +ac_cv_alignof_dbind_struct=1 +ac_cv_alignof_dbus_bool_t=4 +ac_cv_alignof_dbus_int16_t=2 +ac_cv_alignof_dbus_int32_t=4 +ac_cv_alignof_dbus_int64_t=8 +ac_cv_alignof_double=8 |
