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-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99433.patch40
1 files changed, 40 insertions, 0 deletions
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99433.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99433.patch
new file mode 100644
index 0000000..6bc33f2
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99433.patch
@@ -0,0 +1,40 @@
+2010-10-29 Julian Brown <julian@codesourcery.com>
+
+ Launchpad #629671
+
+ gcc/
+ * config/arm/arm.h (REG_CLASS_CONTENTS): Remove soft frame pointer
+ from CORE_REGS and GENERAL_REGS classes.
+ * config/arm/arm.md (*thumb1_movsi_insn): Ignore all parts of final
+ constraint for register preferencing.
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h 2010-11-04 10:45:05 +0000
++++ new/gcc/config/arm/arm.h 2010-11-11 11:12:14 +0000
+@@ -1262,8 +1262,8 @@
+ { 0x0000DF00, 0x00000000, 0x00000000, 0x00000000 }, /* HI_REGS */ \
+ { 0x01000000, 0x00000000, 0x00000000, 0x00000000 }, /* CC_REG */ \
+ { 0x00000000, 0x00000000, 0x00000000, 0x80000000 }, /* VFPCC_REG */ \
+- { 0x0200DFFF, 0x00000000, 0x00000000, 0x00000000 }, /* GENERAL_REGS */ \
+- { 0x0200FFFF, 0x00000000, 0x00000000, 0x00000000 }, /* CORE_REGS */ \
++ { 0x0000DFFF, 0x00000000, 0x00000000, 0x00000000 }, /* GENERAL_REGS */ \
++ { 0x0000FFFF, 0x00000000, 0x00000000, 0x00000000 }, /* CORE_REGS */ \
+ { 0xFAFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x7FFFFFFF } /* ALL_REGS */ \
+ }
+
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md 2010-11-04 10:45:05 +0000
++++ new/gcc/config/arm/arm.md 2010-11-11 11:12:14 +0000
+@@ -5160,8 +5160,8 @@
+ })
+
+ (define_insn "*thumb1_movsi_insn"
+- [(set (match_operand:SI 0 "nonimmediate_operand" "=l,l,l,l,l,>,l, m,*lhk")
+- (match_operand:SI 1 "general_operand" "l, I,J,K,>,l,mi,l,*lhk"))]
++ [(set (match_operand:SI 0 "nonimmediate_operand" "=l,l,l,l,l,>,l, m,*l*h*k")
++ (match_operand:SI 1 "general_operand" "l, I,J,K,>,l,mi,l,*l*h*k"))]
+ "TARGET_THUMB1
+ && ( register_operand (operands[0], SImode)
+ || register_operand (operands[1], SImode))"
+
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