diff options
Diffstat (limited to 'arch/arm/mach-clps711x')
30 files changed, 1982 insertions, 0 deletions
diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig new file mode 100644 index 0000000..dbaae5f --- /dev/null +++ b/arch/arm/mach-clps711x/Kconfig @@ -0,0 +1,78 @@ +if ARCH_CLPS711X + +menu "CLPS711X/EP721X Implementations" + +config ARCH_AUTCPU12 + bool "AUTCPU12" + help + Say Y if you intend to run the kernel on the autronix autcpu12 + board. This board is based on a Cirrus Logic CS89712. + +config ARCH_CDB89712 + bool "CDB89712" + select ISA + help + This is an evaluation board from Cirrus for the CS89712 processor. + The board includes 2 serial ports, Ethernet, IRDA, and expansion + headers. It comes with 16 MB SDRAM and 8 MB flash ROM. + +config ARCH_CEIVA + bool "CEIVA" + help + Say Y here if you intend to run this kernel on the Ceiva/Polaroid + PhotoMax Digital Picture Frame. + +config ARCH_CLEP7312 + bool "CLEP7312" + help + Boards based on the Cirrus Logic 7212/7312 chips. + +config ARCH_EDB7211 + bool "EDB7211" + select ISA + select ARCH_DISCONTIGMEM_ENABLE + select ARCH_SPARSEMEM_ENABLE + select ARCH_SELECT_MEMORY_MODEL + help + Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211 + evaluation board. + +config ARCH_P720T + bool "P720T" + help + Say Y here if you intend to run this kernel on the ARM Prospector + 720T. + +config ARCH_FORTUNET + bool "FORTUNET" + +# XXX Maybe these should indicate register compatibility +# instead of being mutually exclusive. +config ARCH_EP7211 + bool + depends on ARCH_EDB7211 + default y + +config ARCH_EP7212 + bool + depends on ARCH_P720T || ARCH_CEIVA + default y + +config EP72XX_ROM_BOOT + bool "EP72xx ROM boot" + depends on ARCH_EP7211 || ARCH_EP7212 + ---help--- + If you say Y here, your CLPS711x-based kernel will use the bootstrap + mode memory map instead of the normal memory map. + + Processors derived from the Cirrus CLPS-711X core support two boot + modes. Normal mode boots from the external memory device at CS0. + Bootstrap mode rearranges parts of the memory map, placing an + internal 128 byte bootstrap ROM at CS0. This option performs the + address map changes required to support booting in this mode. + + You almost surely want to say N here. + +endmenu + +endif diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile new file mode 100644 index 0000000..4a19731 --- /dev/null +++ b/arch/arm/mach-clps711x/Makefile @@ -0,0 +1,20 @@ +# +# Makefile for the linux kernel. +# + +# Object file lists. + +obj-y := irq.o mm.o time.o +obj-m := +obj-n := +obj- := + +obj-$(CONFIG_ARCH_CEIVA) += ceiva.o +obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o +obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o +obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o +obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o +obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o +obj-$(CONFIG_ARCH_P720T) += p720t.o +leds-$(CONFIG_ARCH_P720T) += p720t-leds.o +obj-$(CONFIG_LEDS) += $(leds-y) diff --git a/arch/arm/mach-clps711x/Makefile.boot b/arch/arm/mach-clps711x/Makefile.boot new file mode 100644 index 0000000..d3d2933 --- /dev/null +++ b/arch/arm/mach-clps711x/Makefile.boot @@ -0,0 +1,7 @@ +# The standard locations for stuff on CLPS711x type processors + zreladdr-y := 0xc0028000 +params_phys-y := 0xc0000100 +# Should probably have some agreement on these... +initrd_phys-$(CONFIG_ARCH_P720T) := 0xc0400000 +initrd_phys-$(CONFIG_ARCH_CDB89712) := 0x00700000 + diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c new file mode 100644 index 0000000..5f18ecc --- /dev/null +++ b/arch/arm/mach-clps711x/autcpu12.c @@ -0,0 +1,74 @@ +/* + * linux/arch/arm/mach-clps711x/autcpu12.c + * + * (c) 2001 Thomas Gleixner, autronix automation <gleixner@autronix.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/types.h> +#include <linux/string.h> +#include <linux/mm.h> +#include <linux/io.h> + +#include <mach/hardware.h> +#include <asm/sizes.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/pgtable.h> +#include <asm/page.h> + +#include <asm/mach/map.h> +#include <mach/autcpu12.h> + +#include "common.h" + +/* + * The on-chip registers are given a size of 1MB so that a section can + * be used to map them; this saves a page table. This is the place to + * add mappings for ROM, expansion memory, PCMCIA, etc. (if static + * mappings are chosen for those areas). + * +*/ + +static struct map_desc autcpu12_io_desc[] __initdata = { + /* memory-mapped extra io and CS8900A Ethernet chip */ + /* ethernet chip */ + { + .virtual = AUTCPU12_VIRT_CS8900A, + .pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A), + .length = SZ_1M, + .type = MT_DEVICE + } +}; + +void __init autcpu12_map_io(void) +{ + clps711x_map_io(); + iotable_init(autcpu12_io_desc, ARRAY_SIZE(autcpu12_io_desc)); +} + +MACHINE_START(AUTCPU12, "autronix autcpu12") + /* Maintainer: Thomas Gleixner */ + .phys_io = 0x80000000, + .io_pg_offst = ((0xff000000) >> 18) & 0xfffc, + .boot_params = 0xc0020000, + .map_io = autcpu12_map_io, + .init_irq = clps711x_init_irq, + .timer = &clps711x_timer, +MACHINE_END + diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c new file mode 100644 index 0000000..71a80b5 --- /dev/null +++ b/arch/arm/mach-clps711x/cdb89712.c @@ -0,0 +1,64 @@ +/* + * linux/arch/arm/mach-clps711x/cdb89712.c + * + * Copyright (C) 2000-2001 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/types.h> +#include <linux/string.h> +#include <linux/mm.h> +#include <linux/io.h> + +#include <mach/hardware.h> +#include <asm/pgtable.h> +#include <asm/page.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> + +#include "common.h" + +/* + * Map the CS89712 Ethernet port. That should be moved to the + * ethernet driver, perhaps. + */ +static struct map_desc cdb89712_io_desc[] __initdata = { + { + .virtual = ETHER_BASE, + .pfn =__phys_to_pfn(ETHER_START), + .length = ETHER_SIZE, + .type = MT_DEVICE + } +}; + +static void __init cdb89712_map_io(void) +{ + clps711x_map_io(); + iotable_init(cdb89712_io_desc, ARRAY_SIZE(cdb89712_io_desc)); +} + +MACHINE_START(CDB89712, "Cirrus-CDB89712") + /* Maintainer: Ray Lehtiniemi */ + .phys_io = 0x80000000, + .io_pg_offst = ((0xff000000) >> 18) & 0xfffc, + .boot_params = 0xc0000100, + .map_io = cdb89712_map_io, + .init_irq = clps711x_init_irq, + .timer = &clps711x_timer, +MACHINE_END diff --git a/arch/arm/mach-clps711x/ceiva.c b/arch/arm/mach-clps711x/ceiva.c new file mode 100644 index 0000000..8ada201 --- /dev/null +++ b/arch/arm/mach-clps711x/ceiva.c @@ -0,0 +1,65 @@ +/* + * linux/arch/arm/mach-clps711x/arch-ceiva.c + * + * Copyright (C) 2002, Rob Scott <rscott@mtrob.fdns.net> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/init.h> +#include <linux/types.h> +#include <linux/string.h> + +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> + +#include <linux/kernel.h> + +#include <mach/hardware.h> +#include <asm/page.h> +#include <asm/pgtable.h> +#include <asm/sizes.h> + +#include <asm/mach/map.h> + +#include "common.h" + +static struct map_desc ceiva_io_desc[] __initdata = { + /* SED1355 controlled video RAM & registers */ + { + .virtual = CEIVA_VIRT_SED1355, + .pfn = __phys_to_pfn(CEIVA_PHYS_SED1355), + .length = SZ_2M, + .type = MT_DEVICE + } +}; + + +static void __init ceiva_map_io(void) +{ + clps711x_map_io(); + iotable_init(ceiva_io_desc, ARRAY_SIZE(ceiva_io_desc)); +} + + +MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame") + /* Maintainer: Rob Scott */ + .phys_io = 0x80000000, + .io_pg_offst = ((0xff000000) >> 18) & 0xfffc, + .boot_params = 0xc0000100, + .map_io = ceiva_map_io, + .init_irq = clps711x_init_irq, + .timer = &clps711x_timer, +MACHINE_END diff --git a/arch/arm/mach-clps711x/clep7312.c b/arch/arm/mach-clps711x/clep7312.c new file mode 100644 index 0000000..09fb57e --- /dev/null +++ b/arch/arm/mach-clps711x/clep7312.c @@ -0,0 +1,49 @@ +/* + * linux/arch/arm/mach-clps711x/clep7312.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/init.h> +#include <linux/types.h> +#include <linux/string.h> + +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> + +#include "common.h" + +static void __init +fixup_clep7312(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + mi->nr_banks=1; + mi->bank[0].start = 0xc0000000; + mi->bank[0].size = 0x01000000; + mi->bank[0].node = 0; +} + + +MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312") + /* Maintainer: Nobody */ + .phys_io = 0x80000000, + .io_pg_offst = ((0xff000000) >> 18) & 0xfffc, + .boot_params = 0xc0000100, + .fixup = fixup_clep7312, + .map_io = clps711x_map_io, + .init_irq = clps711x_init_irq, + .timer = &clps711x_timer, +MACHINE_END + diff --git a/arch/arm/mach-clps711x/common.h b/arch/arm/mach-clps711x/common.h new file mode 100644 index 0000000..2b8b801 --- /dev/null +++ b/arch/arm/mach-clps711x/common.h @@ -0,0 +1,11 @@ +/* + * linux/arch/arm/mach-clps711x/common.h + * + * Common bits. + */ + +struct sys_timer; + +extern void clps711x_map_io(void); +extern void clps711x_init_irq(void); +extern struct sys_timer clps711x_timer; diff --git a/arch/arm/mach-clps711x/edb7211-arch.c b/arch/arm/mach-clps711x/edb7211-arch.c new file mode 100644 index 0000000..dc81cc6 --- /dev/null +++ b/arch/arm/mach-clps711x/edb7211-arch.c @@ -0,0 +1,62 @@ +/* + * linux/arch/arm/mach-clps711x/arch-edb7211.c + * + * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/init.h> +#include <linux/types.h> +#include <linux/string.h> + +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> + +#include "common.h" + +extern void edb7211_map_io(void); + +static void __init +fixup_edb7211(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + /* + * Bank start addresses are not present in the information + * passed in from the boot loader. We could potentially + * detect them, but instead we hard-code them. + * + * Banks sizes _are_ present in the param block, but we're + * not using that information yet. + */ + mi->bank[0].start = 0xc0000000; + mi->bank[0].size = 8*1024*1024; + mi->bank[0].node = 0; + mi->bank[1].start = 0xc1000000; + mi->bank[1].size = 8*1024*1024; + mi->bank[1].node = 1; + mi->nr_banks = 2; +} + +MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)") + /* Maintainer: Jon McClintock */ + .phys_io = 0x80000000, + .io_pg_offst = ((0xff000000) >> 18) & 0xfffc, + .boot_params = 0xc0020100, /* 0xc0000000 - 0xc001ffff can be video RAM */ + .fixup = fixup_edb7211, + .map_io = edb7211_map_io, + .init_irq = clps711x_init_irq, + .timer = &clps711x_timer, +MACHINE_END diff --git a/arch/arm/mach-clps711x/edb7211-mm.c b/arch/arm/mach-clps711x/edb7211-mm.c new file mode 100644 index 0000000..c58e32e --- /dev/null +++ b/arch/arm/mach-clps711x/edb7211-mm.c @@ -0,0 +1,82 @@ +/* + * linux/arch/arm/mach-clps711x/mm.c + * + * Extra MM routines for the EDB7211 board + * + * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/kernel.h> +#include <linux/init.h> + +#include <mach/hardware.h> +#include <asm/page.h> +#include <asm/pgtable.h> +#include <asm/sizes.h> + +#include <asm/mach/map.h> + +extern void clps711x_map_io(void); + +/* + * The on-chip registers are given a size of 1MB so that a section can + * be used to map them; this saves a page table. This is the place to + * add mappings for ROM, expansion memory, PCMCIA, etc. (if static + * mappings are chosen for those areas). + * + * Here is a physical memory map (to be fleshed out later): + * + * Physical Address Size Description + * ----------------- ----- --------------------------------- + * c0000000-c001ffff 128KB reserved for video RAM [1] + * c0020000-c0023fff 16KB parameters (see Documentation/arm/Setup) + * c0024000-c0027fff 16KB swapper_pg_dir (task 0 page directory) + * c0028000-... kernel image (TEXTADDR) + * + * [1] Unused pages should be given back to the VM; they are not yet. + * The parameter block should also be released (not sure if this + * happens). + */ +static struct map_desc edb7211_io_desc[] __initdata = { + { /* memory-mapped extra keyboard row */ + .virtual = EP7211_VIRT_EXTKBD, + .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD), + .length = SZ_1M, + .type = MT_DEVICE, + }, { /* and CS8900A Ethernet chip */ + .virtual = EP7211_VIRT_CS8900A, + .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A), + .length = SZ_1M, + .type = MT_DEVICE, + }, { /* flash banks */ + .virtual = EP7211_VIRT_FLASH1, + .pfn = __phys_to_pfn(EP7211_PHYS_FLASH1), + .length = SZ_8M, + .type = MT_DEVICE, + }, { + .virtual = EP7211_VIRT_FLASH2, + .pfn = __phys_to_pfn(EP7211_PHYS_FLASH2), + .length = SZ_8M, + .type = MT_DEVICE, + } +}; + +void __init edb7211_map_io(void) +{ + clps711x_map_io(); + iotable_init(edb7211_io_desc, ARRAY_SIZE(edb7211_io_desc)); +} + diff --git a/arch/arm/mach-clps711x/fortunet.c b/arch/arm/mach-clps711x/fortunet.c new file mode 100644 index 0000000..7122b3d --- /dev/null +++ b/arch/arm/mach-clps711x/fortunet.c @@ -0,0 +1,87 @@ +/* + * linux/arch/arm/mach-clps711x/fortunet.c + * + * Derived from linux/arch/arm/mach-integrator/arch.c + * + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/types.h> +#include <linux/init.h> +#include <linux/initrd.h> + +#include <mach/hardware.h> +#include <asm/irq.h> +#include <asm/setup.h> +#include <asm/mach-types.h> + +#include <asm/mach/arch.h> + +#include <asm/memory.h> + +#include "common.h" + +struct meminfo memmap = { + .nr_banks = 1, + .bank = { + { + .start = 0xC0000000, + .size = 0x01000000, + .node = 0 + }, + }, +}; + +typedef struct tag_IMAGE_PARAMS +{ + int ramdisk_ok; + int ramdisk_address; + int ramdisk_size; + int ram_size; + int extra_param_type; + int extra_param_ptr; + int command_line; +} IMAGE_PARAMS; + +#define IMAGE_PARAMS_PHYS 0xC01F0000 + +static void __init +fortunet_fixup(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + IMAGE_PARAMS *ip = phys_to_virt(IMAGE_PARAMS_PHYS); + *cmdline = phys_to_virt(ip->command_line); +#ifdef CONFIG_BLK_DEV_INITRD + if(ip->ramdisk_ok) + { + initrd_start = __phys_to_virt(ip->ramdisk_address); + initrd_end = initrd_start + ip->ramdisk_size; + } +#endif + memmap.bank[0].size = ip->ram_size; + *mi = memmap; +} + +MACHINE_START(FORTUNET, "ARM-FortuNet") + /* Maintainer: FortuNet Inc. */ + .phys_io = 0x80000000, + .io_pg_offst = ((0xf0000000) >> 18) & 0xfffc, + .boot_params = 0x00000000, + .fixup = fortunet_fixup, + .map_io = clps711x_map_io, + .init_irq = clps711x_init_irq, + .timer = &clps711x_timer, +MACHINE_END diff --git a/arch/arm/mach-clps711x/include/mach/autcpu12.h b/arch/arm/mach-clps711x/include/mach/autcpu12.h new file mode 100644 index 0000000..1588a36 --- /dev/null +++ b/arch/arm/mach-clps711x/include/mach/autcpu12.h @@ -0,0 +1,78 @@ +/* + * AUTCPU12 specific defines + * + * (c) 2001 Thomas Gleixner, autronix automation <gleixner@autronix.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_AUTCPU12_H +#define __ASM_ARCH_AUTCPU12_H + +/* + * The CS8900A ethernet chip has its I/O registers wired to chip select 2 + * (nCS2). This is the mapping for it. + */ +#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE /* physical */ +#define AUTCPU12_VIRT_CS8900A (0xfe000000) /* virtual */ + +/* + * The flash bank is wired to chip select 0 + */ +#define AUTCPU12_PHYS_FLASH CS0_PHYS_BASE /* physical */ + +/* offset for device specific information structure */ +#define AUTCPU12_LCDINFO_OFFS (0x00010000) +/* +* Videomemory is the internal SRAM (CS 6) +*/ +#define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE +#define AUTCPU12_VIRT_VIDEO (0xfd000000) + +/* +* All special IO's are tied to CS1 +*/ +#define AUTCPU12_PHYS_CHAR_LCD CS1_PHYS_BASE +0x00000000 /* physical */ + +#define AUTCPU12_PHYS_NVRAM CS1_PHYS_BASE +0x02000000 /* physical */ + +#define AUTCPU12_PHYS_CSAUX1 CS1_PHYS_BASE +0x04000000 /* physical */ + +#define AUTCPU12_PHYS_SMC CS1_PHYS_BASE +0x06000000 /* physical */ + +#define AUTCPU12_PHYS_CAN CS1_PHYS_BASE +0x08000000 /* physical */ + +#define AUTCPU12_PHYS_TOUCH CS1_PHYS_BASE +0x0A000000 /* physical */ + +#define AUTCPU12_PHYS_IO CS1_PHYS_BASE +0x0C000000 /* physical */ + +#define AUTCPU12_PHYS_LPT CS1_PHYS_BASE +0x0E000000 /* physical */ + +/* +* defines for smartmedia card access +*/ +#define AUTCPU12_SMC_RDY (1<<2) +#define AUTCPU12_SMC_ALE (1<<3) +#define AUTCPU12_SMC_CLE (1<<4) +#define AUTCPU12_SMC_PORT_OFFSET PBDR +#define AUTCPU12_SMC_SELECT_OFFSET 0x10 +/* +* defines for lcd contrast +*/ +#define AUTCPU12_DPOT_PORT_OFFSET PEDR +#define AUTCPU12_DPOT_CS (1<<0) +#define AUTCPU12_DPOT_CLK (1<<1) +#define AUTCPU12_DPOT_UD (1<<2) + +#endif diff --git a/arch/arm/mach-clps711x/include/mach/debug-macro.S b/arch/arm/mach-clps711x/include/mach/debug-macro.S new file mode 100644 index 0000000..64baf9f --- /dev/null +++ b/arch/arm/mach-clps711x/include/mach/debug-macro.S @@ -0,0 +1,46 @@ +/* arch/arm/mach-clps711x/include/mach/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#include <asm/hardware/clps7111.h> + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + moveq \rx, #CLPS7111_PHYS_BASE + movne \rx, #CLPS7111_VIRT_BASE +#ifndef CONFIG_DEBUG_CLPS711X_UART2 + add \rx, \rx, #0x0000 @ UART1 +#else + add \rx, \rx, #0x1000 @ UART2 +#endif + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #0x0480] @ UARTDR + .endm + + .macro waituart,rd,rx +1001: ldr \rd, [\rx, #0x0140] @ SYSFLGx + tst \rd, #1 << 11 @ UBUSYx + bne 1001b + .endm + + .macro busyuart,rd,rx + tst \rx, #0x1000 @ UART2 does not have CTS here + bne 1002f +1001: ldr \rd, [\rx, #0x0140] @ SYSFLGx + tst \rd, #1 << 8 @ CTS + bne 1001b +1002: + .endm + diff --git a/arch/arm/mach-clps711x/include/mach/dma.h b/arch/arm/mach-clps711x/include/mach/dma.h new file mode 100644 index 0000000..0d620e8 --- /dev/null +++ b/arch/arm/mach-clps711x/include/mach/dma.h @@ -0,0 +1,19 @@ +/* + * arch/arm/mach-clps711x/include/mach/dma.h + * + * Copyright (C) 1997,1998 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ diff --git a/arch/arm/mach-clps711x/include/mach/entry-macro.S b/arch/arm/mach-clps711x/include/mach/entry-macro.S new file mode 100644 index 0000000..90fa2f7 --- /dev/null +++ b/arch/arm/mach-clps711x/include/mach/entry-macro.S @@ -0,0 +1,58 @@ +/* + * arch/arm/mach-clps711x/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for CLPS711X-based platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include <mach/hardware.h> +#include <asm/hardware/clps7111.h> + + .macro disable_fiq + .endm + + .macro get_irqnr_preamble, base, tmp + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + +#if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) +#error INTSR stride != INTMR stride +#endif + + .macro get_irqnr_and_base, irqnr, stat, base, mask + mov \base, #CLPS7111_BASE + ldr \stat, [\base, #INTSR1] + ldr \mask, [\base, #INTMR1] + mov \irqnr, #4 + mov \mask, \mask, lsl #16 + and \stat, \stat, \mask, lsr #16 + movs \stat, \stat, lsr #4 + bne 1001f + + add \base, \base, #INTSR2 - INTSR1 + ldr \stat, [\base, #INTSR1] + ldr \mask, [\base, #INTMR1] + mov \irqnr, #16 + mov \mask, \mask, lsl #16 + and \stat, \stat, \mask, lsr #16 + +1001: tst \stat, #255 + addeq \irqnr, \irqnr, #8 + moveq \stat, \stat, lsr #8 + tst \stat, #15 + addeq \irqnr, \irqnr, #4 + moveq \stat, \stat, lsr #4 + tst \stat, #3 + addeq \irqnr, \irqnr, #2 + moveq \stat, \stat, lsr #2 + tst \stat, #1 + addeq \irqnr, \irqnr, #1 + moveq \stat, \stat, lsr #1 + tst \stat, #1 @ bit 0 should be set + .endm + + diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h new file mode 100644 index 0000000..b3ebe9e --- /dev/null +++ b/arch/arm/mach-clps711x/include/mach/hardware.h @@ -0,0 +1,215 @@ +/* + * arch/arm/mach-clps711x/include/mach/hardware.h + * + * This file contains the hardware definitions of the Prospector P720T. + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + + +#define CLPS7111_VIRT_BASE 0xff000000 +#define CLPS7111_BASE CLPS7111_VIRT_BASE + +/* + * The physical addresses that the external chip select signals map to is + * dependent on the setting of the nMEDCHG signal on EP7211 and EP7212 + * processors. CONFIG_EP72XX_BOOT_ROM is only available if these + * processors are in use. + */ +#ifndef CONFIG_EP72XX_ROM_BOOT +#define CS0_PHYS_BASE (0x00000000) +#define CS1_PHYS_BASE (0x10000000) +#define CS2_PHYS_BASE (0x20000000) +#define CS3_PHYS_BASE (0x30000000) +#define CS4_PHYS_BASE (0x40000000) +#define CS5_PHYS_BASE (0x50000000) +#define CS6_PHYS_BASE (0x60000000) +#define CS7_PHYS_BASE (0x70000000) +#else +#define CS0_PHYS_BASE (0x70000000) +#define CS1_PHYS_BASE (0x60000000) +#define CS2_PHYS_BASE (0x50000000) +#define CS3_PHYS_BASE (0x40000000) +#define CS4_PHYS_BASE (0x30000000) +#define CS5_PHYS_BASE (0x20000000) +#define CS6_PHYS_BASE (0x10000000) +#define CS7_PHYS_BASE (0x00000000) +#endif + +#if defined (CONFIG_ARCH_EP7211) + +#define EP7211_VIRT_BASE CLPS7111_VIRT_BASE +#define EP7211_BASE CLPS7111_VIRT_BASE +#include <asm/hardware/ep7211.h> + +#elif defined (CONFIG_ARCH_EP7212) + +#define EP7212_VIRT_BASE CLPS7111_VIRT_BASE +#define EP7212_BASE CLPS7111_VIRT_BASE +#include <asm/hardware/ep7212.h> + +#endif + +#define SYSPLD_VIRT_BASE 0xfe000000 +#define SYSPLD_BASE SYSPLD_VIRT_BASE + +#ifndef __ASSEMBLER__ + +#define PCIO_BASE IO_BASE + +#endif + + +#if defined (CONFIG_ARCH_AUTCPU12) + +#define CS89712_VIRT_BASE CLPS7111_VIRT_BASE +#define CS89712_BASE CLPS7111_VIRT_BASE + +#include <asm/hardware/clps7111.h> +#include <asm/hardware/ep7212.h> +#include <asm/hardware/cs89712.h> + +#endif + + +#if defined (CONFIG_ARCH_CDB89712) + +#include <asm/hardware/clps7111.h> +#include <asm/hardware/ep7212.h> +#include <asm/hardware/cs89712.h> + +/* static cdb89712_map_io() areas */ +#define REGISTER_START 0x80000000 +#define REGISTER_SIZE 0x4000 +#define REGISTER_BASE 0xff000000 + +#define ETHER_START 0x20000000 +#define ETHER_SIZE 0x1000 +#define ETHER_BASE 0xfe000000 + +#endif + + +#if defined (CONFIG_ARCH_EDB7211) + +/* + * The extra 8 lines of the keyboard matrix are wired to chip select 3 (nCS3) + * and repeat across it. This is the mapping for it. + * + * In jumpered boot mode, nCS3 is mapped to 0x4000000, not 0x3000000. This + * was cause for much consternation and headscratching. This should probably + * be made a compile/run time kernel option. + */ +#define EP7211_PHYS_EXTKBD CS3_PHYS_BASE /* physical */ + +#define EP7211_VIRT_EXTKBD (0xfd000000) /* virtual */ + + +/* + * The CS8900A ethernet chip has its I/O registers wired to chip select 2 + * (nCS2). This is the mapping for it. + * + * In jumpered boot mode, nCS2 is mapped to 0x5000000, not 0x2000000. This + * was cause for much consternation and headscratching. This should probably + * be made a compile/run time kernel option. + */ +#define EP7211_PHYS_CS8900A CS2_PHYS_BASE /* physical */ + +#define EP7211_VIRT_CS8900A (0xfc000000) /* virtual */ + + +/* + * The two flash banks are wired to chip selects 0 and 1. This is the mapping + * for them. + * + * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running + * in jumpered boot mode. + */ +#define EP7211_PHYS_FLASH1 CS0_PHYS_BASE /* physical */ +#define EP7211_PHYS_FLASH2 CS1_PHYS_BASE /* physical */ + +#define EP7211_VIRT_FLASH1 (0xfa000000) /* virtual */ +#define EP7211_VIRT_FLASH2 (0xfb000000) /* virtual */ + +#endif /* CONFIG_ARCH_EDB7211 */ + + +/* + * Relevant bits in port D, which controls power to the various parts of + * the LCD on the EDB7211. + */ +#define EDB_PD1_LCD_DC_DC_EN (1<<1) +#define EDB_PD2_LCDEN (1<<2) +#define EDB_PD3_LCDBL (1<<3) + + +#if defined (CONFIG_ARCH_CEIVA) + +#define CEIVA_VIRT_BASE CLPS7111_VIRT_BASE +#define CEIVA_BASE CLPS7111_VIRT_BASE + +#include <asm/hardware/clps7111.h> +#include <asm/hardware/ep7212.h> + + +/* + * The two flash banks are wired to chip selects 0 and 1. This is the mapping + * for them. + * + * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running + * in jumpered boot mode. + */ +#define CEIVA_PHYS_FLASH1 CS0_PHYS_BASE /* physical */ +#define CEIVA_PHYS_FLASH2 CS1_PHYS_BASE /* physical */ + +#define CEIVA_VIRT_FLASH1 (0xfa000000) /* virtual */ +#define CEIVA_VIRT_FLASH2 (0xfb000000) /* virtual */ + +#define CEIVA_FLASH_SIZE 0x100000 +#define CEIVA_FLASH_WIDTH 2 + +/* + * SED1355 LCD controller + */ +#define CEIVA_PHYS_SED1355 CS2_PHYS_BASE +#define CEIVA_VIRT_SED1355 (0xfc000000) + +/* + * Relevant bits in port D, which controls power to the various parts of + * the LCD on the Ceiva Photo Max, and reset to the LCD controller. + */ + +// Reset line to SED1355 (must be high to operate) +#define CEIVA_PD1_LCDRST (1<<1) +// LCD panel enable (set to one, to enable LCD) +#define CEIVA_PD4_LCDEN (1<<4) +// Backlight (set to one, to turn on backlight +#define CEIVA_PD5_LCDBL (1<<5) + +/* + * Relevant bits in port B, which report the status of the buttons. + */ + +// White button +#define CEIVA_PB4_WHT_BTN (1<<4) +// Black button +#define CEIVA_PB0_BLK_BTN (1<<0) +#endif // #if defined (CONFIG_ARCH_CEIVA) + +#endif diff --git a/arch/arm/mach-clps711x/include/mach/io.h b/arch/arm/mach-clps711x/include/mach/io.h new file mode 100644 index 0000000..4c84400 --- /dev/null +++ b/arch/arm/mach-clps711x/include/mach/io.h @@ -0,0 +1,38 @@ +/* + * arch/arm/mach-clps711x/include/mach/io.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#include <mach/hardware.h> + +#define IO_SPACE_LIMIT 0xffffffff + +#define __io(a) ((void __iomem *)(a)) +#define __mem_pci(a) (a) + +/* + * We don't support ins[lb]/outs[lb]. Make them fault. + */ +#define __raw_readsb(p,d,l) do { *(int *)0 = 0; } while (0) +#define __raw_readsl(p,d,l) do { *(int *)0 = 0; } while (0) +#define __raw_writesb(p,d,l) do { *(int *)0 = 0; } while (0) +#define __raw_writesl(p,d,l) do { *(int *)0 = 0; } while (0) + +#endif diff --git a/arch/arm/mach-clps711x/include/mach/irqs.h b/arch/arm/mach-clps711x/include/mach/irqs.h new file mode 100644 index 0000000..30b7e97 --- /dev/null +++ b/arch/arm/mach-clps711x/include/mach/irqs.h @@ -0,0 +1,53 @@ +/* + * arch/arm/mach-clps711x/include/mach/irqs.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * Interrupts from INTSR1 + */ +#define IRQ_CSINT 4 +#define IRQ_EINT1 5 +#define IRQ_EINT2 6 +#define IRQ_EINT3 7 +#define IRQ_TC1OI 8 +#define IRQ_TC2OI 9 +#define IRQ_RTCMI 10 +#define IRQ_TINT 11 +#define IRQ_UTXINT1 12 +#define IRQ_URXINT1 13 +#define IRQ_UMSINT 14 +#define IRQ_SSEOTI 15 + +#define INT1_IRQS (0x0000fff0) +#define INT1_ACK_IRQS (0x00004f10) + +/* + * Interrupts from INTSR2 + */ +#define IRQ_KBDINT (16+0) /* bit 0 */ +#define IRQ_SS2RX (16+1) /* bit 1 */ +#define IRQ_SS2TX (16+2) /* bit 2 */ +#define IRQ_UTXINT2 (16+12) /* bit 12 */ +#define IRQ_URXINT2 (16+13) /* bit 13 */ + +#define INT2_IRQS (0x30070000) +#define INT2_ACK_IRQS (0x00010000) + +#define NR_IRQS 30 + diff --git a/arch/arm/mach-clps711x/include/mach/memory.h b/arch/arm/mach-clps711x/include/mach/memory.h new file mode 100644 index 0000000..98ec30c --- /dev/null +++ b/arch/arm/mach-clps711x/include/mach/memory.h @@ -0,0 +1,96 @@ +/* + * arch/arm/mach-clps711x/include/mach/memory.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + + +/* + * Physical DRAM offset. + */ +#define PHYS_OFFSET UL(0xc0000000) + +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ + +#if defined(CONFIG_ARCH_CDB89712) + +#define __virt_to_bus(x) (x) +#define __bus_to_virt(x) (x) + +#elif defined (CONFIG_ARCH_AUTCPU12) + +#define __virt_to_bus(x) (x) +#define __bus_to_virt(x) (x) + +#else + +#define __virt_to_bus(x) ((x) - PAGE_OFFSET) +#define __bus_to_virt(x) ((x) + PAGE_OFFSET) + +#endif + + +/* + * Like the SA1100, the EDB7211 has a large gap between physical RAM + * banks. In 2.2, the Psion (CL-PS7110) port added custom support for + * discontiguous physical memory. In 2.4, we can use the standard + * Linux NUMA support. + * + * This is not necessary for EP7211 implementations with only one used + * memory bank. For those systems, simply undefine CONFIG_DISCONTIGMEM. + */ + +/* + * The PS7211 allows up to 256MB max per DRAM bank, but the EDB7211 + * uses only one of the two banks (bank #1). However, even within + * bank #1, memory is discontiguous. + * + * The EDB7211 has two 8MB DRAM areas with 8MB of empty space between + * them, so we use 24 for the node max shift to get 16MB node sizes. + */ + +/* + * Because of the wide memory address space between physical RAM banks on the + * SA1100, it's much more convenient to use Linux's NUMA support to implement + * our memory map representation. Assuming all memory nodes have equal access + * characteristics, we then have generic discontiguous memory support. + * + * Of course, all this isn't mandatory for SA1100 implementations with only + * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM. + * + * The nodes are matched with the physical memory bank addresses which are + * incidentally the same as virtual addresses. + * + * node 0: 0xc0000000 - 0xc7ffffff + * node 1: 0xc8000000 - 0xcfffffff + * node 2: 0xd0000000 - 0xd7ffffff + * node 3: 0xd8000000 - 0xdfffffff + */ +#define NODE_MEM_SIZE_BITS 24 +#define SECTION_SIZE_BITS 24 +#define MAX_PHYSMEM_BITS 32 + +#endif + diff --git a/arch/arm/mach-clps711x/include/mach/syspld.h b/arch/arm/mach-clps711x/include/mach/syspld.h new file mode 100644 index 0000000..f7f4c12 --- /dev/null +++ b/arch/arm/mach-clps711x/include/mach/syspld.h @@ -0,0 +1,121 @@ +/* + * arch/arm/mach-clps711x/include/mach/syspld.h + * + * System Control PLD register definitions. + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSPLD_H +#define __ASM_ARCH_SYSPLD_H + +#define SYSPLD_PHYS_BASE (0x10000000) + +#ifndef __ASSEMBLY__ +#include <asm/types.h> + +#define SYSPLD_REG(type,off) (*(volatile type *)(SYSPLD_BASE + off)) +#else +#define SYSPLD_REG(type,off) (off) +#endif + +#define PLD_INT SYSPLD_REG(u32, 0x000000) +#define PLD_INT_PENIRQ (1 << 5) +#define PLD_INT_UCB_IRQ (1 << 1) +#define PLD_INT_KBD_ATN (1 << 0) /* EINT1 */ + +#define PLD_PWR SYSPLD_REG(u32, 0x000004) +#define PLD_PWR_EXT (1 << 5) +#define PLD_PWR_MODE (1 << 4) /* 1 = PWM, 0 = PFM */ +#define PLD_S4_ON (1 << 3) /* LCD bias voltage enable */ +#define PLD_S3_ON (1 << 2) /* LCD backlight enable */ +#define PLD_S2_ON (1 << 1) /* LCD 3V3 supply enable */ +#define PLD_S1_ON (1 << 0) /* LCD 3V supply enable */ + +#define PLD_KBD SYSPLD_REG(u32, 0x000008) +#define PLD_KBD_WAKE (1 << 1) +#define PLD_KBD_EN (1 << 0) + +#define PLD_SPI SYSPLD_REG(u32, 0x00000c) +#define PLD_SPI_EN (1 << 0) + +#define PLD_IO SYSPLD_REG(u32, 0x000010) +#define PLD_IO_BOOTSEL (1 << 6) /* boot sel switch */ +#define PLD_IO_USER (1 << 5) /* user defined switch */ +#define PLD_IO_LED3 (1 << 4) +#define PLD_IO_LED2 (1 << 3) +#define PLD_IO_LED1 (1 << 2) +#define PLD_IO_LED0 (1 << 1) +#define PLD_IO_LEDEN (1 << 0) + +#define PLD_IRDA SYSPLD_REG(u32, 0x000014) +#define PLD_IRDA_EN (1 << 0) + +#define PLD_COM2 SYSPLD_REG(u32, 0x000018) +#define PLD_COM2_EN (1 << 0) + +#define PLD_COM1 SYSPLD_REG(u32, 0x00001c) +#define PLD_COM1_EN (1 << 0) + +#define PLD_AUD SYSPLD_REG(u32, 0x000020) +#define PLD_AUD_DIV1 (1 << 6) +#define PLD_AUD_DIV0 (1 << 5) +#define PLD_AUD_CLK_SEL1 (1 << 4) +#define PLD_AUD_CLK_SEL0 (1 << 3) +#define PLD_AUD_MIC_PWR (1 << 2) +#define PLD_AUD_MIC_GAIN (1 << 1) +#define PLD_AUD_CODEC_EN (1 << 0) + +#define PLD_CF SYSPLD_REG(u32, 0x000024) +#define PLD_CF2_SLEEP (1 << 5) +#define PLD_CF1_SLEEP (1 << 4) +#define PLD_CF2_nPDREQ (1 << 3) +#define PLD_CF1_nPDREQ (1 << 2) +#define PLD_CF2_nIRQ (1 << 1) +#define PLD_CF1_nIRQ (1 << 0) + +#define PLD_SDC SYSPLD_REG(u32, 0x000028) +#define PLD_SDC_INT_EN (1 << 2) +#define PLD_SDC_WP (1 << 1) +#define PLD_SDC_CD (1 << 0) + +#define PLD_FPGA SYSPLD_REG(u32, 0x00002c) + +#define PLD_CODEC SYSPLD_REG(u32, 0x400000) +#define PLD_CODEC_IRQ3 (1 << 4) +#define PLD_CODEC_IRQ2 (1 << 3) +#define PLD_CODEC_IRQ1 (1 << 2) +#define PLD_CODEC_EN (1 << 0) + +#define PLD_BRITE SYSPLD_REG(u32, 0x400004) +#define PLD_BRITE_UP (1 << 1) +#define PLD_BRITE_DN (1 << 0) + +#define PLD_LCDEN SYSPLD_REG(u32, 0x400008) +#define PLD_LCDEN_EN (1 << 0) + +#define PLD_ID SYSPLD_REG(u32, 0x40000c) + +#define PLD_TCH SYSPLD_REG(u32, 0x400010) +#define PLD_TCH_PENIRQ (1 << 1) +#define PLD_TCH_EN (1 << 0) + +#define PLD_GPIO SYSPLD_REG(u32, 0x400014) +#define PLD_GPIO2 (1 << 2) +#define PLD_GPIO1 (1 << 1) +#define PLD_GPIO0 (1 << 0) + +#endif diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h new file mode 100644 index 0000000..24e9615 --- /dev/null +++ b/arch/arm/mach-clps711x/include/mach/system.h @@ -0,0 +1,40 @@ +/* + * arch/arm/mach-clps711x/include/mach/system.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include <linux/io.h> +#include <mach/hardware.h> +#include <asm/hardware/clps7111.h> + +static inline void arch_idle(void) +{ + clps_writel(1, HALT); + __asm__ __volatile__( + "mov r0, r0\n\ + mov r0, r0"); +} + +static inline void arch_reset(char mode) +{ + cpu_reset(0); +} + +#endif diff --git a/arch/arm/mach-clps711x/include/mach/time.h b/arch/arm/mach-clps711x/include/mach/time.h new file mode 100644 index 0000000..8fe283c --- /dev/null +++ b/arch/arm/mach-clps711x/include/mach/time.h @@ -0,0 +1,49 @@ +/* + * arch/arm/mach-clps711x/include/mach/time.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <asm/leds.h> +#include <asm/hardware/clps7111.h> + +extern void clps711x_setup_timer(void); + +/* + * IRQ handler for the timer + */ +static irqreturn_t +p720t_timer_interrupt(int irq, void *dev_id) +{ + struct pt_regs *regs = get_irq_regs(); + do_leds(); + do_timer(1); +#ifndef CONFIG_SMP + update_process_times(user_mode(regs)); +#endif + do_profile(regs); + return IRQ_HANDLED; +} + +/* + * Set up timer interrupt, and return the current time in seconds. + */ +void __init time_init(void) +{ + clps711x_setup_timer(); + timer_irq.handler = p720t_timer_interrupt; + setup_irq(IRQ_TC2OI, &timer_irq); +} diff --git a/arch/arm/mach-clps711x/include/mach/timex.h b/arch/arm/mach-clps711x/include/mach/timex.h new file mode 100644 index 0000000..ac8823c --- /dev/null +++ b/arch/arm/mach-clps711x/include/mach/timex.h @@ -0,0 +1,23 @@ +/* + * arch/arm/mach-clps711x/include/mach/timex.h + * + * Prospector 720T architecture timex specifications + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define CLOCK_TICK_RATE 512000 diff --git a/arch/arm/mach-clps711x/include/mach/uncompress.h b/arch/arm/mach-clps711x/include/mach/uncompress.h new file mode 100644 index 0000000..7164310 --- /dev/null +++ b/arch/arm/mach-clps711x/include/mach/uncompress.h @@ -0,0 +1,59 @@ +/* + * arch/arm/mach-clps711x/include/mach/uncompress.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <mach/io.h> +#include <mach/hardware.h> +#include <asm/hardware/clps7111.h> + +#undef CLPS7111_BASE +#define CLPS7111_BASE CLPS7111_PHYS_BASE + +#define __raw_readl(p) (*(unsigned long *)(p)) +#define __raw_writel(v,p) (*(unsigned long *)(p) = (v)) + +#ifdef CONFIG_DEBUG_CLPS711X_UART2 +#define SYSFLGx SYSFLG2 +#define UARTDRx UARTDR2 +#else +#define SYSFLGx SYSFLG1 +#define UARTDRx UARTDR1 +#endif + +/* + * This does not append a newline + */ +static inline void putc(int c) +{ + while (clps_readl(SYSFLGx) & SYSFLG_UTXFF) + barrier(); + clps_writel(c, UARTDRx); +} + +static inline void flush(void) +{ + while (clps_readl(SYSFLGx) & SYSFLG_UBUSY) + barrier(); +} + +/* + * nothing to do + */ +#define arch_decomp_setup() + +#define arch_decomp_wdog() diff --git a/arch/arm/mach-clps711x/include/mach/vmalloc.h b/arch/arm/mach-clps711x/include/mach/vmalloc.h new file mode 100644 index 0000000..ea6cc7b --- /dev/null +++ b/arch/arm/mach-clps711x/include/mach/vmalloc.h @@ -0,0 +1,20 @@ +/* + * arch/arm/mach-clps711x/include/mach/vmalloc.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#define VMALLOC_END (PAGE_OFFSET + 0x10000000) diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/irq.c new file mode 100644 index 0000000..9a12d85 --- /dev/null +++ b/arch/arm/mach-clps711x/irq.c @@ -0,0 +1,143 @@ +/* + * linux/arch/arm/mach-clps711x/irq.c + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/init.h> +#include <linux/list.h> +#include <linux/io.h> + +#include <asm/mach/irq.h> +#include <mach/hardware.h> +#include <asm/irq.h> + +#include <asm/hardware/clps7111.h> + +static void int1_mask(unsigned int irq) +{ + u32 intmr1; + + intmr1 = clps_readl(INTMR1); + intmr1 &= ~(1 << irq); + clps_writel(intmr1, INTMR1); +} + +static void int1_ack(unsigned int irq) +{ + u32 intmr1; + + intmr1 = clps_readl(INTMR1); + intmr1 &= ~(1 << irq); + clps_writel(intmr1, INTMR1); + + switch (irq) { + case IRQ_CSINT: clps_writel(0, COEOI); break; + case IRQ_TC1OI: clps_writel(0, TC1EOI); break; + case IRQ_TC2OI: clps_writel(0, TC2EOI); break; + case IRQ_RTCMI: clps_writel(0, RTCEOI); break; + case IRQ_TINT: clps_writel(0, TEOI); break; + case IRQ_UMSINT: clps_writel(0, UMSEOI); break; + } +} + +static void int1_unmask(unsigned int irq) +{ + u32 intmr1; + + intmr1 = clps_readl(INTMR1); + intmr1 |= 1 << irq; + clps_writel(intmr1, INTMR1); +} + +static struct irq_chip int1_chip = { + .ack = int1_ack, + .mask = int1_mask, + .unmask = int1_unmask, +}; + +static void int2_mask(unsigned int irq) +{ + u32 intmr2; + + intmr2 = clps_readl(INTMR2); + intmr2 &= ~(1 << (irq - 16)); + clps_writel(intmr2, INTMR2); +} + +static void int2_ack(unsigned int irq) +{ + u32 intmr2; + + intmr2 = clps_readl(INTMR2); + intmr2 &= ~(1 << (irq - 16)); + clps_writel(intmr2, INTMR2); + + switch (irq) { + case IRQ_KBDINT: clps_writel(0, KBDEOI); break; + } +} + +static void int2_unmask(unsigned int irq) +{ + u32 intmr2; + + intmr2 = clps_readl(INTMR2); + intmr2 |= 1 << (irq - 16); + clps_writel(intmr2, INTMR2); +} + +static struct irq_chip int2_chip = { + .ack = int2_ack, + .mask = int2_mask, + .unmask = int2_unmask, +}; + +void __init clps711x_init_irq(void) +{ + unsigned int i; + + for (i = 0; i < NR_IRQS; i++) { + if (INT1_IRQS & (1 << i)) { + set_irq_handler(i, handle_level_irq); + set_irq_chip(i, &int1_chip); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + if (INT2_IRQS & (1 << i)) { + set_irq_handler(i, handle_level_irq); + set_irq_chip(i, &int2_chip); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + } + + /* + * Disable interrupts + */ + clps_writel(0, INTMR1); + clps_writel(0, INTMR2); + + /* + * Clear down any pending interrupts + */ + clps_writel(0, COEOI); + clps_writel(0, TC1EOI); + clps_writel(0, TC2EOI); + clps_writel(0, RTCEOI); + clps_writel(0, TEOI); + clps_writel(0, UMSEOI); + clps_writel(0, SYNCIO); + clps_writel(0, KBDEOI); +} diff --git a/arch/arm/mach-clps711x/mm.c b/arch/arm/mach-clps711x/mm.c new file mode 100644 index 0000000..a7b4591 --- /dev/null +++ b/arch/arm/mach-clps711x/mm.c @@ -0,0 +1,49 @@ +/* + * linux/arch/arm/mach-clps711x/mm.c + * + * Generic MM setup for the CLPS711x-based machines. + * + * Copyright (C) 2001 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/kernel.h> +#include <linux/mm.h> +#include <linux/init.h> +#include <linux/bootmem.h> + +#include <asm/sizes.h> +#include <mach/hardware.h> +#include <asm/pgtable.h> +#include <asm/page.h> +#include <asm/mach/map.h> +#include <asm/hardware/clps7111.h> + +/* + * This maps the generic CLPS711x registers + */ +static struct map_desc clps711x_io_desc[] __initdata = { + { + .virtual = CLPS7111_VIRT_BASE, + .pfn = __phys_to_pfn(CLPS7111_PHYS_BASE), + .length = SZ_1M, + .type = MT_DEVICE + } +}; + +void __init clps711x_map_io(void) +{ + iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc)); +} diff --git a/arch/arm/mach-clps711x/p720t-leds.c b/arch/arm/mach-clps711x/p720t-leds.c new file mode 100644 index 0000000..1512144 --- /dev/null +++ b/arch/arm/mach-clps711x/p720t-leds.c @@ -0,0 +1,67 @@ +/* + * linux/arch/arm/mach-clps711x/leds.c + * + * Integrator LED control routines + * + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/io.h> + +#include <mach/hardware.h> +#include <asm/leds.h> +#include <asm/system.h> +#include <asm/mach-types.h> + +#include <asm/hardware/clps7111.h> +#include <asm/hardware/ep7212.h> + +static void p720t_leds_event(led_event_t ledevt) +{ + unsigned long flags; + u32 pddr; + + local_irq_save(flags); + switch(ledevt) { + case led_idle_start: + break; + + case led_idle_end: + break; + + case led_timer: + pddr = clps_readb(PDDR); + clps_writeb(pddr ^ 1, PDDR); + break; + + default: + break; + } + + local_irq_restore(flags); +} + +static int __init leds_init(void) +{ + if (machine_is_p720t()) + leds_event = p720t_leds_event; + + return 0; +} + +arch_initcall(leds_init); diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c new file mode 100644 index 0000000..0d94a30 --- /dev/null +++ b/arch/arm/mach-clps711x/p720t.c @@ -0,0 +1,125 @@ +/* + * linux/arch/arm/mach-clps711x/p720t.c + * + * Copyright (C) 2000-2001 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/types.h> +#include <linux/string.h> +#include <linux/mm.h> +#include <linux/io.h> + +#include <mach/hardware.h> +#include <asm/pgtable.h> +#include <asm/page.h> +#include <asm/setup.h> +#include <asm/sizes.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <mach/syspld.h> + +#include "common.h" + +/* + * Map the P720T system PLD. It occupies two address spaces: + * SYSPLD_PHYS_BASE and SYSPLD_PHYS_BASE + 0x00400000 + * We map both here. + */ +static struct map_desc p720t_io_desc[] __initdata = { + { + .virtual = SYSPLD_VIRT_BASE, + .pfn = __phys_to_pfn(SYSPLD_PHYS_BASE), + .length = SZ_1M, + .type = MT_DEVICE + }, { + .virtual = 0xfe400000, + .pfn = __phys_to_pfn(0x10400000), + .length = SZ_1M, + .type = MT_DEVICE + } +}; + +static void __init +fixup_p720t(struct machine_desc *desc, struct tag *tag, + char **cmdline, struct meminfo *mi) +{ + /* + * Our bootloader doesn't setup any tags (yet). + */ + if (tag->hdr.tag != ATAG_CORE) { + tag->hdr.tag = ATAG_CORE; + tag->hdr.size = tag_size(tag_core); + tag->u.core.flags = 0; + tag->u.core.pagesize = PAGE_SIZE; + tag->u.core.rootdev = 0x0100; + + tag = tag_next(tag); + tag->hdr.tag = ATAG_MEM; + tag->hdr.size = tag_size(tag_mem32); + tag->u.mem.size = 4096; + tag->u.mem.start = PHYS_OFFSET; + + tag = tag_next(tag); + tag->hdr.tag = ATAG_NONE; + tag->hdr.size = 0; + } +} + +static void __init p720t_map_io(void) +{ + clps711x_map_io(); + iotable_init(p720t_io_desc, ARRAY_SIZE(p720t_io_desc)); +} + +MACHINE_START(P720T, "ARM-Prospector720T") + /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ + .phys_io = 0x80000000, + .io_pg_offst = ((0xff000000) >> 18) & 0xfffc, + .boot_params = 0xc0000100, + .fixup = fixup_p720t, + .map_io = p720t_map_io, + .init_irq = clps711x_init_irq, + .timer = &clps711x_timer, +MACHINE_END + +static int p720t_hw_init(void) +{ + /* + * Power down as much as possible in case we don't + * have the drivers loaded. + */ + PLD_LCDEN = 0; + PLD_PWR &= ~(PLD_S4_ON|PLD_S3_ON|PLD_S2_ON|PLD_S1_ON); + + PLD_KBD = 0; + PLD_IO = 0; + PLD_IRDA = 0; + PLD_CODEC = 0; + PLD_TCH = 0; + PLD_SPI = 0; +#ifndef CONFIG_DEBUG_LL + PLD_COM2 = 0; + PLD_COM1 = 0; +#endif + + return 0; +} + +__initcall(p720t_hw_init); + diff --git a/arch/arm/mach-clps711x/time.c b/arch/arm/mach-clps711x/time.c new file mode 100644 index 0000000..d581ef0 --- /dev/null +++ b/arch/arm/mach-clps711x/time.c @@ -0,0 +1,84 @@ +/* + * linux/arch/arm/mach-clps711x/time.c + * + * Copyright (C) 2001 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/timex.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/sched.h> +#include <linux/io.h> + +#include <mach/hardware.h> +#include <asm/irq.h> +#include <asm/leds.h> +#include <asm/hardware/clps7111.h> + +#include <asm/mach/time.h> + + +/* + * gettimeoffset() returns time since last timer tick, in usecs. + * + * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy. + * 'tick' is usecs per jiffy. + */ +static unsigned long clps711x_gettimeoffset(void) +{ + unsigned long hwticks; + hwticks = LATCH - (clps_readl(TC2D) & 0xffff); /* since last underflow */ + return (hwticks * (tick_nsec / 1000)) / LATCH; +} + +/* + * IRQ handler for the timer + */ +static irqreturn_t +p720t_timer_interrupt(int irq, void *dev_id) +{ + timer_tick(); + return IRQ_HANDLED; +} + +static struct irqaction clps711x_timer_irq = { + .name = "CLPS711x Timer Tick", + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, + .handler = p720t_timer_interrupt, +}; + +static void __init clps711x_timer_init(void) +{ + struct timespec tv; + unsigned int syscon; + + syscon = clps_readl(SYSCON1); + syscon |= SYSCON1_TC2S | SYSCON1_TC2M; + clps_writel(syscon, SYSCON1); + + clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */ + + setup_irq(IRQ_TC2OI, &clps711x_timer_irq); + + tv.tv_nsec = 0; + tv.tv_sec = clps_readl(RTCDR); + do_settimeofday(&tv); +} + +struct sys_timer clps711x_timer = { + .init = clps711x_timer_init, + .offset = clps711x_gettimeoffset, +}; |
