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-rw-r--r--board_enable.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/board_enable.c b/board_enable.c
index ddb6669..4251601 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -28,6 +28,7 @@
#include <fcntl.h>
#include "flash.h"
+#if defined(__i386__) || defined(__x86_64__)
/*
* Helper functions for many Winbond Super I/Os of the W836xx range.
*/
@@ -1348,6 +1349,8 @@ static int it8712f_gpio3_1_raise(const char *name)
return it8712f_gpio_set(32, 1);
}
+#endif
+
/**
* Below is the list of boards which need a special "board enable" code in
* flashrom before their ROM chip can be accessed/written to.
@@ -1391,6 +1394,7 @@ static int it8712f_gpio3_1_raise(const char *name)
struct board_pciid_enable board_pciid_enables[] = {
/* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... OK? flash enable */
+#if defined(__i386__) || defined(__x86_64__)
{0x10DE, 0x0547, 0x147B, 0x1C2F, 0x10DE, 0x0548, 0x147B, 0x1C2F, NULL, NULL, NULL, "Abit", "AN-M2", 0, NT, nvidia_mcp_gpio2_raise},
{0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, OK, intel_ich_gpio16_raise},
{0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "Abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise},
@@ -1458,7 +1462,7 @@ struct board_pciid_enable board_pciid_enables[] = {
{0x1106, 0x3123, 0x1106, 0x3123, 0x1106, 0x3059, 0x1106, 0x4161, NULL, NULL, NULL, "Termtek", "TK-3370 (Rev:2.5B)", 0, OK, w836xx_memw_enable_4e},
{0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, "VIA", "EPIA M/MII/...", 0, OK, via_vt823x_gpio15_raise},
{0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, "VIA", "EPIA-N/NL", 0, OK, via_vt823x_gpio9_raise},
-
+#endif
{ 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL, 0, NT, NULL}, /* end marker */
};
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