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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-05-09 02:09:45 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-05-09 02:09:45 +0000 |
| commit | 03adbe12691d512c0d9f28caa93cb35e468fd5d3 (patch) | |
| tree | 9bd6460e4a69d0647706ab139184870b32244441 /wbsio_spi.c | |
| parent | c3129208648f241c0b6538235cd4e9854ae6539d (diff) | |
| download | ast2050-flashrom-03adbe12691d512c0d9f28caa93cb35e468fd5d3.zip ast2050-flashrom-03adbe12691d512c0d9f28caa93cb35e468fd5d3.tar.gz | |
Refine handling of spi_write_enable() failures to fix chip erases on ichspi
Until the ICH SPI driver can handle preopcodes as standalone opcodes,
we should handle such special opcode failure gracefully on ICH and
compatible chipsets.
This fixes chip erase on almost all ICH+VIA SPI masters.
Thanks to Ali Nadalizadeh for helping track down this bug!
Corresponding to flashrom svn r484.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Diffstat (limited to 'wbsio_spi.c')
| -rw-r--r-- | wbsio_spi.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/wbsio_spi.c b/wbsio_spi.c index a3e96fd..6ab277a 100644 --- a/wbsio_spi.c +++ b/wbsio_spi.c @@ -189,6 +189,7 @@ int wbsio_spi_read(struct flashchip *flash, uint8_t *buf) int wbsio_spi_write(struct flashchip *flash, uint8_t *buf) { int pos, size = flash->total_size * 1024; + int result; if (flash->total_size > 1024) { fprintf(stderr, "%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__); @@ -196,7 +197,9 @@ int wbsio_spi_write(struct flashchip *flash, uint8_t *buf) } flash->erase(flash); - spi_write_enable(); + result = spi_write_enable(); + if (result) + return result; for (pos = 0; pos < size; pos++) { spi_byte_program(pos, buf[pos]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) |
