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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2011-05-03 21:49:41 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2011-05-03 21:49:41 +0000 |
| commit | 54ce73a1f5c7ddecc7579c136dbac9c2c201b621 (patch) | |
| tree | f24b7ce88dfdedbb3388cb3f6e4e44ee4e9f15f0 /satamv.c | |
| parent | 8ed293416dc3d47539dd95709f2b1dc0ccfe0736 (diff) | |
| download | ast2050-flashrom-54ce73a1f5c7ddecc7579c136dbac9c2c201b621.zip ast2050-flashrom-54ce73a1f5c7ddecc7579c136dbac9c2c201b621.tar.gz | |
Revert MMIO space writes on shutdown as needed
Reversible MMIO space writes now use rmmio_write*().
Reversible PCI MMIO space writes now use pci_rmmio_write*().
If a MMIO value needs to be queued for restore without writing it,
use rmmio_val*().
MMIO space writes which are one-shot (e.g. communication with some chip)
should continue to use the permanent mmio_write* variants.
Corresponding to flashrom svn r1292.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
David tested it successfully on some NM10/ICH7 platforms which switch
between SPI and LPC targets (x86 BIOS ROM vs. EC firmware ROM).
Acked-by: David Hendricks <dhendrix@google.com>
Diffstat (limited to 'satamv.c')
| -rw-r--r-- | satamv.c | 6 |
1 files changed, 2 insertions, 4 deletions
@@ -102,8 +102,7 @@ int satamv_init(void) msg_pspew("BAR2Sz=0x%01x\n", (tmp >> 19) & 0x7); tmp &= 0xffffffc0; tmp |= 0x0000001f; - /* FIXME: This needs to be an auto-reversible write. */ - pci_mmio_writel(tmp, mv_bar + PCI_BAR2_CONTROL); + pci_rmmio_writel(tmp, mv_bar + PCI_BAR2_CONTROL); /* Enable flash: GPIO Port Control Register 0x104f0 */ tmp = pci_mmio_readl(mv_bar + GPIO_PORT_CONTROL); @@ -114,8 +113,7 @@ int satamv_init(void) "values!\n"); tmp &= 0xfffffffc; tmp |= 0x2; - /* FIXME: This needs to be an auto-reversible write. */ - pci_mmio_writel(tmp, mv_bar + GPIO_PORT_CONTROL); + pci_rmmio_writel(tmp, mv_bar + GPIO_PORT_CONTROL); /* Get I/O BAR location. */ tmp = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_2) & |
