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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2011-04-27 14:34:08 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2011-04-27 14:34:08 +0000
commitbfecef6986b25b630605054680264daf09046f65 (patch)
treea54fe83e5bd047ca0ae0af1469973a76acddceb8 /nic3com.c
parent880e867ae823dbbd140731f2eaa2ea656b4b9153 (diff)
downloadast2050-flashrom-bfecef6986b25b630605054680264daf09046f65.zip
ast2050-flashrom-bfecef6986b25b630605054680264daf09046f65.tar.gz
Add support for more than one Super I/O or EC per machine
Flashrom currently only supports exactly one Super I/O or Embedded Controller, and this means quite a few notebooks and a small subset of desktop/server boards cannot be handled reliably and easily. Allow detection and initialization of up to 3 Super I/O and/or EC chips. WARNING! If a Super I/O or EC responds on multiple ports (0x2e and 0x4e), the code will do the wrong thing (namely, initialize the hardware twice). I have no idea if we should handle such situations, and whether we should ignore the second chip with identical ID or not. Initializing the hardware twice for the IT87* family is _not_ a problem, but I don't know how well IT85* can handle it (and whether IT85* would listen at more than one port anyway). Corresponding to flashrom svn r1289. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Thanks to Thomas Schneider for testing on a board with ITE IT87* SPI. Test report (success) is here: http://paste.flashrom.org/view.php?id=379 Thanks to David Hendricks for testing on a Google Cr-48 laptop with ITE IT85* EC SPI. Test report (success) is here: http://www.flashrom.org/pipermail/flashrom/2011-April/006275.html Acked-by: David Hendricks <dhendrix@google.com>
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