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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-04-22 13:33:43 +0000 |
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| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-04-22 13:33:43 +0000 |
| commit | 42882fd97e404952269e84a762d2304964a72899 (patch) | |
| tree | a74a6b18258bf2dc80d0726ce420fe3cb061ac9a /layout.c | |
| parent | 691568bf2f987e153abc69b2268a4e2bd2cb2286 (diff) | |
| download | ast2050-flashrom-42882fd97e404952269e84a762d2304964a72899.zip ast2050-flashrom-42882fd97e404952269e84a762d2304964a72899.tar.gz | |
All "unknown xy SPI chip" entries claim to have status UNTESTED for probe/read/erase/write
That is incorrect.
A bit of confusion comes from how the #defines are named. We call them
TEST_BAD_*, but the message printed by flashrom says: "This flash part
has status NOT WORKING for operations:"
Something that is unimplemented is definitely not working.
Neither of the chip entries mentioned above has erase or write functions
implemented, so erase and write are not working. Since their size is
unknown, we can't read them in. That means read is not working as well.
Probing is a different matter. If a chip-specific probe function had
matched, we wouldn't have to handle the chip with the "unknown xy SPI
chip" fallback. I'm tempted to call that "not working" as well, but I'm
open to discussion on this point.
Corresponding to flashrom svn r439 and coreboot v2 svn r4177.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Diffstat (limited to 'layout.c')
0 files changed, 0 insertions, 0 deletions
