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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-11-15 17:13:29 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-11-15 17:13:29 +0000
commit9f46cfca38fad1c35c02bddfaa1f5325e5cd5354 (patch)
tree78f6e15401905632b29a18e08700772a5e380f4b /gfxnvidia.c
parent964f27498b21177e01607bf3c20c5e3e9054b85a (diff)
downloadast2050-flashrom-9f46cfca38fad1c35c02bddfaa1f5325e5cd5354.zip
ast2050-flashrom-9f46cfca38fad1c35c02bddfaa1f5325e5cd5354.tar.gz
Add support for every single SiS chipset out there
The two existing SiS chipset enables (compared to the 28 in this patch) were refactored, and one of them was fixed. A function to match PCI vendor/class combinations was added to generic code. Tested on the "Elitegroup K7S5A". Results are somewhat unexpected (some PCI settings seem to be inaccessible, but it still works). This is not based on any docs, but rather on detailed analysis of existing opensource code for some of the chipsets. Thanks to for Adrian Glaubitz testing. Corresponding to flashrom svn r759. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
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