summaryrefslogtreecommitdiffstats
path: root/flash_rom.c
diff options
context:
space:
mode:
authorLuc Verhaegen <libv@skynet.be>2007-04-04 22:45:58 +0000
committerStefan Reinauer <stefan.reinauer@coreboot.org>2007-04-04 22:45:58 +0000
commit8e3a600123110d47076926cb8ee7c68195658f20 (patch)
treed2865da3322423bfafd95ef73853e29bb1833377 /flash_rom.c
parentaf2b52dc5f48f245d9b6097a03d4b1f52938a891 (diff)
downloadast2050-flashrom-8e3a600123110d47076926cb8ee7c68195658f20.zip
ast2050-flashrom-8e3a600123110d47076926cb8ee7c68195658f20.tar.gz
Split flash_enable.c into chipset_enable.c and board_enable.c
This splits up the ROM Write enable code into chipset specific and board specific parts. This of course means that a lot of code is plainly moved about. * Allows for linuxbios name matching and pci-subsystem id matching. The latter uses a double set to properly distuinguish boards despite of some known vendors being lax about it. * Fixes GPIO15 being raised on every VT8235 southbridge, regardless of what that line actually controls; rom on EPIA-M, backlight on mitac 8999 laptop. * Adds flashrom support for Asus A7V400-MX (KM400 + VT8235) * Island aruma was renamed agami aruma, the board specific code now got adjusted. A set of pci-ids was retrieved from source code. Corresponding to flashrom svn r99 and coreboot v2 svn r2581. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Stefan Reinauer <stepan@coresystems.de>
Diffstat (limited to 'flash_rom.c')
-rw-r--r--flash_rom.c84
1 files changed, 80 insertions, 4 deletions
diff --git a/flash_rom.c b/flash_rom.c
index 8d04b92..ba391cb 100644
--- a/flash_rom.c
+++ b/flash_rom.c
@@ -35,6 +35,15 @@
#include <string.h>
#include <stdlib.h>
#include <getopt.h>
+#include <pci/pci.h>
+
+/* for iopl */
+#if defined (__sun) && (defined(__i386) || defined(__amd64))
+#include <strings.h>
+#include <sys/sysi86.h>
+#include <sys/psw.h>
+#include <asm/sunddi.h>
+#endif
#include "flash.h"
#include "lbtable.h"
@@ -42,10 +51,54 @@
#include "debug.h"
char *chip_to_probe = NULL;
-
+struct pci_access *pacc; /* For board and chipset_enable */
int exclude_start_page, exclude_end_page;
int force=0, verbose=0;
+/*
+ *
+ */
+struct pci_dev *
+pci_dev_find(uint16_t vendor, uint16_t device)
+{
+ struct pci_dev *temp;
+ struct pci_filter filter;
+
+ pci_filter_init(NULL, &filter);
+ filter.vendor = vendor;
+ filter.device = device;
+
+ for (temp = pacc->devices; temp; temp = temp->next)
+ if (pci_filter_match(&filter, temp))
+ return temp;
+
+ return NULL;
+}
+
+/*
+ *
+ */
+struct pci_dev *
+pci_card_find(uint16_t vendor, uint16_t device,
+ uint16_t card_vendor, uint16_t card_device)
+{
+ struct pci_dev *temp;
+ struct pci_filter filter;
+
+ pci_filter_init(NULL, &filter);
+ filter.vendor = vendor;
+ filter.device = device;
+
+ for (temp = pacc->devices; temp; temp = temp->next)
+ if (pci_filter_match(&filter, temp)) {
+ if ((card_vendor == pci_read_word(temp, 0x2C)) &&
+ (card_device == pci_read_word(temp, 0x2E)))
+ return temp;
+ }
+
+ return NULL;
+}
+
struct flashchip *probe_flash(struct flashchip *flash)
{
int fd_mem;
@@ -72,10 +125,11 @@ struct flashchip *probe_flash(struct flashchip *flash)
__FUNCTION__, flash->total_size * 1024,
(unsigned long) size);
}
+
bios = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
fd_mem, (off_t) (0xffffffff - size + 1));
if (bios == MAP_FAILED) {
- perror("Error: Can't mmap /dev/mem.");
+ perror("Error: Can't mmap " MEM_DEV ".");
exit(1);
}
flash->virt_addr = bios;
@@ -92,7 +146,7 @@ struct flashchip *probe_flash(struct flashchip *flash)
bios = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
fd_mem, (off_t) (0x9400000));
if (bios == MAP_FAILED) {
- perror("Error: Can't mmap /dev/mem.");
+ perror("Error: Can't mmap " MEM_DEV ".");
exit(1);
}
flash->virt_addr = bios;
@@ -281,6 +335,22 @@ int main(int argc, char *argv[])
if (optind < argc)
filename = argv[optind++];
+ /* First get full io access */
+#if defined (__sun) && (defined(__i386) || defined(__amd64))
+ if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0){
+#else
+ if (iopl(3) != 0) {
+#endif
+ fprintf(stderr, "ERROR: iopl failed: \"%s\"\n", strerror(errno));
+ exit(1);
+ }
+
+ /* Initialize PCI access for flash enables */
+ pacc = pci_alloc(); /* Get the pci_access structure */
+ /* Set all options you want -- here we stick with the defaults */
+ pci_init(pacc); /* Initialize the PCI library */
+ pci_scan_bus(pacc); /* We want to get the list of devices */
+
printf("Calibrating delay loop... ");
myusec_calibrate_delay();
printf("ok\n");
@@ -293,7 +363,13 @@ int main(int argc, char *argv[])
/* try to enable it. Failure IS an option, since not all motherboards
* really need this to be done, etc., etc.
*/
- (void) enable_flash_write();
+ ret = chipset_flash_enable();
+ if (ret == -2)
+ printf("WARNING: No chipset found. Flash detection "
+ "will most likely fail.\n");
+
+ board_flash_enable(lb_vendor, lb_part);
+
if ((flash = probe_flash(flashchips)) == NULL) {
printf("No EEPROM/flash device found.\n");
OpenPOWER on IntegriCloud