diff options
author | Nikolay Petukhov <nikolay.petukhov@gmail.com> | 2008-05-17 01:08:58 +0000 |
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committer | Peter Stuge <peter@stuge.se> | 2008-05-17 01:08:58 +0000 |
commit | 4784c47a882247c107ba2e1c3c63e71b7d78e844 (patch) | |
tree | fb7ab264b5a252ffee6aec466827c2e1da8ff22f /flash.h | |
parent | fc52409252eb3f6f05547cf28b0e44793a39a6a4 (diff) | |
download | ast2050-flashrom-4784c47a882247c107ba2e1c3c63e71b7d78e844.zip ast2050-flashrom-4784c47a882247c107ba2e1c3c63e71b7d78e844.tar.gz |
Support Pm49FL004/2 Block Locking Registers
The PMC chips understand both LPC and FWH flash commands. When in FWH mode
(MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block
Locking Registers by default lock the flash chip for write and erase - in
addition to any chipset write protection.
This patch adds unlock operations before Pm49FL004/2 write and erase, and
it includes an svn mv pm49fl004.c pm49fl00x.c
Thanks go to Nikolay for this patch.
Corresponding to flashrom svn r243 and coreboot v2 svn r3332.
Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Bari Ari <bari@onelabs.com>
Diffstat (limited to 'flash.h')
-rw-r--r-- | flash.h | 8 |
1 files changed, 4 insertions, 4 deletions
@@ -453,10 +453,10 @@ int probe_29f002(struct flashchip *flash); int erase_29f002(struct flashchip *flash); int write_29f002(struct flashchip *flash, uint8_t *buf); -/* pm49fl004.c */ -int probe_49fl004(struct flashchip *flash); -int erase_49fl004(struct flashchip *flash); -int write_49fl004(struct flashchip *flash, uint8_t *buf); +/* pm49fl00x.c */ +int probe_49fl00x(struct flashchip *flash); +int erase_49fl00x(struct flashchip *flash); +int write_49fl00x(struct flashchip *flash, uint8_t *buf); /* sharplhf00l04.c */ int probe_lhf00l04(struct flashchip *flash); |