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| author | Stefan Reinauer <stepan@coresystems.de> | 2008-06-30 23:45:22 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2008-06-30 23:45:22 +0000 |
| commit | 2cb94e183be9c69afcf426f70a9b4cb2bbd8bded (patch) | |
| tree | 151967e33263eafe4b36b556765e565532349af0 /flash.h | |
| parent | e3eb9c1d69fcd878b8f6c153dbc1e15fd8b3d08d (diff) | |
| download | ast2050-flashrom-2cb94e183be9c69afcf426f70a9b4cb2bbd8bded.zip ast2050-flashrom-2cb94e183be9c69afcf426f70a9b4cb2bbd8bded.tar.gz | |
First attempt to clean up SPI probing and create a common construct: the flash bus
At some point the flash bus will be part of struct flashchip.
Pardon me for pushing this in, but I think it is important to beware of further
decay and it will improve things for other developers in the short run.
Carl-Daniel, I will consider your suggestions in another patch. I want to keep
things from getting too much for now. The patch includes Rudolf's VIA SPI
changes though.
Corresponding to flashrom svn r285 and coreboot v2 svn r3401.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Diffstat (limited to 'flash.h')
| -rw-r--r-- | flash.h | 15 |
1 files changed, 11 insertions, 4 deletions
@@ -370,10 +370,17 @@ void print_supported_boards(void); /* chipset_enable.c */ int chipset_flash_enable(void); void print_supported_chipsets(void); -extern int ich7_detected; -extern int viaspi_detected; -extern int ich9_detected; -extern void *ich_spibar; + +typedef enum { + BUS_TYPE_LPC, + BUS_TYPE_ICH7_SPI, + BUS_TYPE_ICH9_SPI, + BUS_TYPE_IT87XX_SPI, + BUS_TYPE_VIA_SPI +} flashbus_t; + +extern flashbus_t flashbus; +extern void *spibar; /* Physical memory mapping device */ #if defined (__sun) && (defined(__i386) || defined(__amd64)) |
