path: root/chipset_enable.c
diff options
authorStefan Tauner <>2011-07-25 20:38:52 +0000
committerStefan Tauner <>2011-07-25 20:38:52 +0000
commit716e09848a85d1b79dd1a4a6ec20707febeee2f0 (patch)
tree5ff0e8e70159b87f162eac1332696c00ae8b4d27 /chipset_enable.c
parenta08d0f2242a0a5370ed00e6f26be7aef977dd028 (diff)
Add a bunch of new/tested stuff and various small changes 5
- mark EN25F80 as fully tested - mark W25Q16 as fully tested - mark W39V040A as fully tested - mark Pm25LV040 as fully tested reported by TL1 on IRC - mark W49F002U/N as fully tested - mark W39V080FA as fully tested - add ASUS P4S533-X to the list of supported boards - add ASUS M4A785TD-V EVO to the list of supported boards - add GA-945PL-S3P (rev. 6.6) to the list of supported boards reported by TL1 on IRC - add MS-7142 (K8MM-V) to the list of supported boards - add MS-7369 (K9N Neo V2) to the list of supported boards - add X7DBT-INF to the list of supported boards - mark SiS 645DX chipset enable as OK - mark SiS 651 chipset enable as OK - move intel_ich_gpio34_raise to the correct line(s) - change the output of unlock_w39_fwh_block from 0x%x to 0x%08x - fix output for untested chipset enables (missing space) - reorder the board enable in print.c entry for GA-8SIMLH added in r1385. - minor other fixes - fix output for multiple found flash chips by adding quotes and commas - similarly fix output of "Found/Assuming" chips Corresponding to flashrom svn r1386. Signed-off-by: Stefan Tauner <> the last two points are Acked-by: Carl-Daniel Hailfinger <> everything else is Acked-by: Stefan Tauner <>
Diffstat (limited to 'chipset_enable.c')
1 files changed, 3 insertions, 3 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index ecb020c..b31639a 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1031,10 +1031,10 @@ const struct penable chipset_enables[] = {
{0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis540},
{0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540},
{0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540},
- {0x1039, 0x0646, NT, "SiS", "645DX", enable_flash_sis540},
+ {0x1039, 0x0646, OK, "SiS", "645DX", enable_flash_sis540},
{0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis540},
{0x1039, 0x0650, NT, "SiS", "650", enable_flash_sis540},
- {0x1039, 0x0651, NT, "SiS", "651", enable_flash_sis540},
+ {0x1039, 0x0651, OK, "SiS", "651", enable_flash_sis540},
{0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540},
{0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540},
{0x1039, 0x0730, NT, "SiS", "730", enable_flash_sis540},
@@ -1229,7 +1229,7 @@ int chipset_flash_enable(void)
msg_pinfo("Found chipset \"%s %s\"",
- msg_pdbg("with PCI ID %04x:%04x",
+ msg_pdbg(" with PCI ID %04x:%04x",
msg_pinfo(". ");
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