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| author | Joshua Roys <roysjosh@gmail.com> | 2011-08-11 05:47:32 +0000 |
|---|---|---|
| committer | Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> | 2011-08-11 05:47:32 +0000 |
| commit | 1fd4f9e8336789974cc84919018545564d7dcc0e (patch) | |
| tree | a7457710f7eaee5408c6ef8ff97d13687f8115d1 /board_enable.c | |
| parent | ac8b2a1f8ab244f5e70c0d39839700000915a2d5 (diff) | |
| download | ast2050-flashrom-1fd4f9e8336789974cc84919018545564d7dcc0e.zip ast2050-flashrom-1fd4f9e8336789974cc84919018545564d7dcc0e.tar.gz | |
Add board enable for ASUS P5GD2 Premium
This is based on Joshua's patch, but with a DMI pattern, contrary to
http://www.flashrom.org/pipermail/flashrom/2010-September/004745.html
Rationale: although it looks like all P5GD2/C* might use the same
board enable (intel_ich_gpio21_raise), we need to add the variants
individually as long as we don't have enough reports to make a
better guess. This also guarantees correct output of flashrom -L and -z
and on activation of the board enable - not like this:
http://www.flashrom.org/pipermail/flashrom/attachments/20100930/2286e5d1/attachment-0003.txt
Success report:
http://www.flashrom.org/pipermail/flashrom/2010-August/004555.html
Also, fix last commit by adding a missing comma.
Corresponding to flashrom svn r1411.
Tested-by: Roberto Malinverni
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Diffstat (limited to 'board_enable.c')
| -rw-r--r-- | board_enable.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/board_enable.c b/board_enable.c index 4ff7423..aba6f38 100644 --- a/board_enable.c +++ b/board_enable.c @@ -1494,6 +1494,7 @@ static int intel_ich_gpio19_raise(void) * - ASUS P4P800-E Deluxe: Intel socket478 + 865PE + ICH5R * - ASUS P4P800-VM: Intel socket478 + 865PE + ICH5R * - ASUS P5GD1 Pro: Intel LGA 775 + 915P + ICH6R + * - ASUS P5GD2 Premium: Intel LGA775 + 915G + ICH6R * - ASUS P5GDC Deluxe: Intel socket775 + 915P + ICH6R * - ASUS P5PE-VM: Intel LGA775 + 865G + ICH5 * - Samsung Polaris 32: socket478 + 865P + ICH5 @@ -2022,8 +2023,9 @@ const struct board_pciid_enable board_pciid_enables[] = { {0x1039, 0x0661, 0x1043, 0x8113, 0x1039, 0x5513, 0x1043, 0x8087, NULL, NULL, NULL, P3, "ASUS", "P4S800-MX", 512, OK, w836xx_memw_enable_2e}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", P3, "ASUS", "P5A", 0, OK, board_asus_p5a}, {0x8086, 0x266a, 0x1043, 0x80a6, 0x8086, 0x2668, 0x1043, 0x814e, NULL, NULL, NULL, P3, "ASUS", "P5GD1 Pro", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x266a, 0x1043, 0x80a6, 0x8086, 0x2668, 0x1043, 0x813d, "^P5GD2-Premium$", NULL, NULL, P3, "ASUS", "P5GD2 Premium", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x266a, 0x1043, 0x80a6, 0x8086, 0x2668, 0x1043, 0x813d, NULL, NULL, NULL, P3, "ASUS", "P5GDC Deluxe", 0, OK, intel_ich_gpio21_raise}, - {0x8086, 0x27da, 0x1043, 0x8179, 0x8086, 0x27b8 0x1043, 0x8179, "^P5LD2$", NULL, NULL, P3, "ASUS", "P5LD2", 0, NT, intel_ich_gpio16_raise}, + {0x8086, 0x27da, 0x1043, 0x8179, 0x8086, 0x27b8, 0x1043, 0x8179, "^P5LD2$", NULL, NULL, P3, "ASUS", "P5LD2", 0, NT, intel_ich_gpio16_raise}, {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, P3, "ASUS", "P5ND2-SLI Deluxe", 0, OK, nvidia_mcp_gpio10_raise}, {0x8086, 0x24dd, 0x1043, 0x80a6, 0x8086, 0x2570, 0x1043, 0x8157, NULL, NULL, NULL, P3, "ASUS", "P5PE-VM", 0, OK, intel_ich_gpio21_raise}, {0x10b7, 0x9055, 0x1028, 0x0082, 0x8086, 0x7190, 0, 0, NULL, NULL, NULL, P3, "Dell", "OptiPlex GX1", 0, OK, intel_piix4_gpo30_lower}, |
