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| author | FENG yu ning <fengyuning1984@gmail.com> | 2008-12-15 02:32:11 +0000 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2008-12-15 02:32:11 +0000 |
| commit | f041e9b5865c9b5544905d163b47d2387732c634 (patch) | |
| tree | 7e43780959ba8b54ea09bc0711ef3e31bc989df7 /Makefile | |
| parent | 7de8639b29c4988ccf7ee110fc5ba6e7e66986f8 (diff) | |
| download | ast2050-flashrom-f041e9b5865c9b5544905d163b47d2387732c634.zip ast2050-flashrom-f041e9b5865c9b5544905d163b47d2387732c634.tar.gz | |
Various ichspi.c refinements
* add a generic preop-opcode-pair table.
* rename ich_check_opcodes to ich_init_opcodes.
* let ich_init_opcodes do not need to access flashchip structure:
. move the definition of struct preop_opcode_pair to a better place
. remove preop_opcode_pairs from 'struct flashchip'
. modify ich_init_opcodes and generate_opcodes so that they do not access the flashchip structure
* call ich_init_opcodes during chipset enable. Now OPCODES generation mechanism works.
* fix a coding style mistake.
Corresponding to flashrom svn r367 and coreboot v2 svn r3814.
Signed-off-by: FENG yu ning <fengyuning1984@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Diffstat (limited to 'Makefile')
0 files changed, 0 insertions, 0 deletions
