Add SPI multicommand infrastructure

Some SPI opcodes need to be sent in direct succession after each other
without any chip deselect happening in between. A prominent example is
WREN (Write Enable) directly before PP (Page Program). Intel calls the
first opcode in such a row "preopcode".

Right now, we ignore the direct succession requirement completely and it
works pretty well because most onboard SPI masters have a timing or
heuristics which make the problem disappear.
The FT2232 SPI flasher is different. Since it is an external flasher,
timing is very different to what we can expect from onboard flashers and
this leads to failure at slow speeds.

This patch allows any function to submit multiple SPI commands in a
stream to any flasher. Support in the individual flashers isn't
implemented yet, so there is one generic function which passes the each
command in the stream one-by-one to the command functions of the
selected SPI flash driver.

Tested-by: Jakob Bornecrantz <wallbraker@gmail.com>

Corresponding to flashrom svn r645.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Jakob Bornecrantz <wallbraker@gmail.com>

8 files changed, 60 insertions, 42 deletions

diff --git a/dummyflasher.c b/dummyflasher.c
index 64b083e..1b51032 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -141,7 +141,7 @@ void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len)
 	return;
 }
 
-int dummy_spi_command(unsigned int writecnt, unsigned int readcnt,
+int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		      const unsigned char *writearr, unsigned char *readarr)
 {
 	int i;
diff --git a/flash.h b/flash.h
index d978624..9e6ca6c 100644
--- a/flash.h
+++ b/flash.h
@@ -350,7 +350,7 @@ uint8_t dummy_chip_readb(const chipaddr addr);
 uint16_t dummy_chip_readw(const chipaddr addr);
 uint32_t dummy_chip_readl(const chipaddr addr);
 void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
-int dummy_spi_command(unsigned int writecnt, unsigned int readcnt,
+int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		      const unsigned char *writearr, unsigned char *readarr);
 
 /* nic3com.c */
@@ -372,7 +372,7 @@ extern struct pcidev_status satas_sii[];
 #define FTDI_FT4232H 0x6011
 extern char *ft2232spi_param;
 int ft2232_spi_init(void);
-int ft2232_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
+int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
 int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
 int ft2232_spi_write1(struct flashchip *flash, uint8_t *buf);
 int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf);
@@ -414,14 +414,22 @@ enum spi_controller {
 	SPI_CONTROLLER_FT2232,
 	SPI_CONTROLLER_DUMMY,
 };
+struct spi_command {
+	unsigned int writecnt;
+	unsigned int readcnt;
+	const unsigned char *writearr;
+	unsigned char *readarr;
+};
+
 extern enum spi_controller spi_controller;
 extern void *spibar;
 int probe_spi_rdid(struct flashchip *flash);
 int probe_spi_rdid4(struct flashchip *flash);
 int probe_spi_rems(struct flashchip *flash);
 int probe_spi_res(struct flashchip *flash);
-int spi_command(unsigned int writecnt, unsigned int readcnt,
+int spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		const unsigned char *writearr, unsigned char *readarr);
+int spi_send_multicommand(struct spi_command *spicommands);
 int spi_write_enable(void);
 int spi_write_disable(void);
 int spi_chip_erase_60(struct flashchip *flash);
@@ -465,7 +473,7 @@ int write_en29f002a(struct flashchip *flash, uint8_t *buf);
 
 /* ichspi.c */
 int ich_init_opcodes(void);
-int ich_spi_command(unsigned int writecnt, unsigned int readcnt,
+int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		    const unsigned char *writearr, unsigned char *readarr);
 int ich_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
 int ich_spi_write_256(struct flashchip *flash, uint8_t * buf);
@@ -476,14 +484,14 @@ void enter_conf_mode_ite(uint16_t port);
 void exit_conf_mode_ite(uint16_t port);
 int it87spi_init(void);
 int it87xx_probe_spi_flash(const char *name);
-int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt,
+int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 			const unsigned char *writearr, unsigned char *readarr);
 int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len);
 int it8716f_spi_chip_write_1(struct flashchip *flash, uint8_t *buf);
 int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf);
 
 /* sb600spi.c */
-int sb600_spi_command(unsigned int writecnt, unsigned int readcnt,
+int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		      const unsigned char *writearr, unsigned char *readarr);
 int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
 int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf);
@@ -582,7 +590,7 @@ int write_49f002(struct flashchip *flash, uint8_t *buf);
 
 /* wbsio_spi.c */
 int wbsio_check_for_spi(const char *name);
-int wbsio_spi_command(unsigned int writecnt, unsigned int readcnt,
+int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		      const unsigned char *writearr, unsigned char *readarr);
 int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
 int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf);
diff --git a/ft2232_spi.c b/ft2232_spi.c
index d8ca743..ea7a810 100644
--- a/ft2232_spi.c
+++ b/ft2232_spi.c
@@ -193,7 +193,7 @@ int ft2232_spi_init(void)
 	return 0;
 }
 
-int ft2232_spi_command(unsigned int writecnt, unsigned int readcnt,
+int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		const unsigned char *writearr, unsigned char *readarr)
 {
 	struct ftdi_context *ftdic = &ftdic_context;
@@ -298,7 +298,7 @@ int ft2232_spi_init(void)
 	exit(1);
 }
 
-int ft2232_spi_command(unsigned int writecnt, unsigned int readcnt,
+int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		const unsigned char *writearr, unsigned char *readarr)
 {
 	fprintf(stderr, "FT2232 SPI support was not compiled in\n");
diff --git a/ichspi.c b/ichspi.c
index b87bd5c..6ad55bb 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -682,7 +682,7 @@ int ich_spi_write_256(struct flashchip *flash, uint8_t * buf)
 	return rc;
 }
 
-int ich_spi_command(unsigned int writecnt, unsigned int readcnt,
+int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		    const unsigned char *writearr, unsigned char *readarr)
 {
 	int a;
diff --git a/it87spi.c b/it87spi.c
index 67dfd2b..f062f4d 100644
--- a/it87spi.c
+++ b/it87spi.c
@@ -141,7 +141,7 @@ int it87xx_probe_spi_flash(const char *name)
  * commands with the address in inverse wire order. That's why the register
  * ordering in case 4 and 5 may seem strange.
  */
-int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt,
+int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 			const unsigned char *writearr, unsigned char *readarr)
 {
 	uint8_t busy, writeenc;
diff --git a/sb600spi.c b/sb600spi.c
index 4ca905b..faafd82 100644
--- a/sb600spi.c
+++ b/sb600spi.c
@@ -52,7 +52,7 @@ uint8_t sb600_read_status_register(void)
 	unsigned char readarr[JEDEC_RDSR_INSIZE];
 
 	/* Read Status Register */
-	spi_command(sizeof(cmd), sizeof(readarr), cmd, readarr);
+	spi_send_command(sizeof(cmd), sizeof(readarr), cmd, readarr);
 	return readarr[0];
 }
 
@@ -103,7 +103,7 @@ static void execute_command(void)
 		;
 }
 
-int sb600_spi_command(unsigned int writecnt, unsigned int readcnt,
+int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		      const unsigned char *writearr, unsigned char *readarr)
 {
 	int count;
diff --git a/spi.c b/spi.c
index 3160754..16dfe36 100644
--- a/spi.c
+++ b/spi.c
@@ -32,25 +32,25 @@ void *spibar = NULL;
 
 void spi_prettyprint_status_register(struct flashchip *flash);
 
-int spi_command(unsigned int writecnt, unsigned int readcnt,
+int spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		const unsigned char *writearr, unsigned char *readarr)
 {
 	switch (spi_controller) {
 	case SPI_CONTROLLER_IT87XX:
-		return it8716f_spi_command(writecnt, readcnt, writearr,
+		return it8716f_spi_send_command(writecnt, readcnt, writearr,
 					   readarr);
 	case SPI_CONTROLLER_ICH7:
 	case SPI_CONTROLLER_ICH9:
 	case SPI_CONTROLLER_VIA:
-		return ich_spi_command(writecnt, readcnt, writearr, readarr);
+		return ich_spi_send_command(writecnt, readcnt, writearr, readarr);
 	case SPI_CONTROLLER_SB600:
-		return sb600_spi_command(writecnt, readcnt, writearr, readarr);
+		return sb600_spi_send_command(writecnt, readcnt, writearr, readarr);
 	case SPI_CONTROLLER_WBSIO:
-		return wbsio_spi_command(writecnt, readcnt, writearr, readarr);
+		return wbsio_spi_send_command(writecnt, readcnt, writearr, readarr);
 	case SPI_CONTROLLER_FT2232:
-		return ft2232_spi_command(writecnt, readcnt, writearr, readarr);
+		return ft2232_spi_send_command(writecnt, readcnt, writearr, readarr);
 	case SPI_CONTROLLER_DUMMY:
-		return dummy_spi_command(writecnt, readcnt, writearr, readarr);
+		return dummy_spi_send_command(writecnt, readcnt, writearr, readarr);
 	default:
 		printf_debug
 		    ("%s called, but no SPI chipset/strapping detected\n",
@@ -59,13 +59,23 @@ int spi_command(unsigned int writecnt, unsigned int readcnt,
 	return 1;
 }
 
+int spi_send_multicommand(struct spi_command *spicommands)
+{
+	int res = 0;
+	while ((spicommands->writecnt || spicommands->readcnt) && !res) {
+		res = spi_send_command(spicommands->writecnt, spicommands->readcnt,
+				       spicommands->writearr, spicommands->readarr);
+	}
+	return res;
+}
+
 static int spi_rdid(unsigned char *readarr, int bytes)
 {
 	const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID };
 	int ret;
 	int i;
 
-	ret = spi_command(sizeof(cmd), bytes, cmd, readarr);
+	ret = spi_send_command(sizeof(cmd), bytes, cmd, readarr);
 	if (ret)
 		return ret;
 	printf_debug("RDID returned");
@@ -81,14 +91,14 @@ static int spi_rems(unsigned char *readarr)
 	uint32_t readaddr;
 	int ret;
 
-	ret = spi_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr);
+	ret = spi_send_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr);
 	if (ret == SPI_INVALID_ADDRESS) {
 		/* Find the lowest even address allowed for reads. */
 		readaddr = (spi_get_valid_read_addr() + 1) & ~1;
 		cmd[1] = (readaddr >> 16) & 0xff,
 		cmd[2] = (readaddr >> 8) & 0xff,
 		cmd[3] = (readaddr >> 0) & 0xff,
-		ret = spi_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr);
+		ret = spi_send_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr);
 	}
 	if (ret)
 		return ret;
@@ -102,14 +112,14 @@ static int spi_res(unsigned char *readarr)
 	uint32_t readaddr;
 	int ret;
 
-	ret = spi_command(sizeof(cmd), JEDEC_RES_INSIZE, cmd, readarr);
+	ret = spi_send_command(sizeof(cmd), JEDEC_RES_INSIZE, cmd, readarr);
 	if (ret == SPI_INVALID_ADDRESS) {
 		/* Find the lowest even address allowed for reads. */
 		readaddr = (spi_get_valid_read_addr() + 1) & ~1;
 		cmd[1] = (readaddr >> 16) & 0xff,
 		cmd[2] = (readaddr >> 8) & 0xff,
 		cmd[3] = (readaddr >> 0) & 0xff,
-		ret = spi_command(sizeof(cmd), JEDEC_RES_INSIZE, cmd, readarr);
+		ret = spi_send_command(sizeof(cmd), JEDEC_RES_INSIZE, cmd, readarr);
 	}
 	if (ret)
 		return ret;
@@ -123,7 +133,7 @@ int spi_write_enable(void)
 	int result;
 
 	/* Send WREN (Write Enable) */
-	result = spi_command(sizeof(cmd), 0, cmd, NULL);
+	result = spi_send_command(sizeof(cmd), 0, cmd, NULL);
 
 	if (result)
 		printf_debug("%s failed", __func__);
@@ -150,7 +160,7 @@ int spi_write_disable(void)
 	const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = { JEDEC_WRDI };
 
 	/* Send WRDI (Write Disable) */
-	return spi_command(sizeof(cmd), 0, cmd, NULL);
+	return spi_send_command(sizeof(cmd), 0, cmd, NULL);
 }
 
 static int probe_spi_rdid_generic(struct flashchip *flash, int bytes)
@@ -292,7 +302,7 @@ uint8_t spi_read_status_register(void)
 		/* SB600 uses a different way to read status register. */
 		return sb600_read_status_register();
 	} else {
-		ret = spi_command(sizeof(cmd), sizeof(readarr), cmd, readarr);
+		ret = spi_send_command(sizeof(cmd), sizeof(readarr), cmd, readarr);
 		if (ret)
 			printf_debug("RDSR failed!\n");
 	}
@@ -419,7 +429,7 @@ int spi_chip_erase_60(struct flashchip *flash)
 	if (result)
 		return result;
 	/* Send CE (Chip Erase) */
-	result = spi_command(sizeof(cmd), 0, cmd, NULL);
+	result = spi_send_command(sizeof(cmd), 0, cmd, NULL);
 	if (result) {
 		printf_debug("spi_chip_erase_60 failed sending erase\n");
 		return result;
@@ -451,7 +461,7 @@ int spi_chip_erase_c7(struct flashchip *flash)
 	if (result)
 		return result;
 	/* Send CE (Chip Erase) */
-	result = spi_command(sizeof(cmd), 0, cmd, NULL);
+	result = spi_send_command(sizeof(cmd), 0, cmd, NULL);
 	if (result) {
 		printf_debug("spi_chip_erase_60 failed sending erase\n");
 		return result;
@@ -492,7 +502,7 @@ int spi_block_erase_52(struct flashchip *flash, unsigned int addr, unsigned int
 	if (result)
 		return result;
 	/* Send BE (Block Erase) */
-	spi_command(sizeof(cmd), 0, cmd, NULL);
+	spi_send_command(sizeof(cmd), 0, cmd, NULL);
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 100-4000 ms, so wait in 100 ms steps.
 	 */
@@ -522,7 +532,7 @@ int spi_block_erase_d8(struct flashchip *flash, unsigned int addr, unsigned int
 	if (result)
 		return result;
 	/* Send BE (Block Erase) */
-	spi_command(sizeof(cmd), 0, cmd, NULL);
+	spi_send_command(sizeof(cmd), 0, cmd, NULL);
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 100-4000 ms, so wait in 100 ms steps.
 	 */
@@ -572,7 +582,7 @@ int spi_block_erase_20(struct flashchip *flash, unsigned int addr, unsigned int
 	if (result)
 		return result;
 	/* Send SE (Sector Erase) */
-	spi_command(sizeof(cmd), 0, cmd, NULL);
+	spi_send_command(sizeof(cmd), 0, cmd, NULL);
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 15-800 ms, so wait in 10 ms steps.
 	 */
@@ -609,7 +619,7 @@ int spi_write_status_enable(void)
 	int result;
 
 	/* Send EWSR (Enable Write Status Register). */
-	result = spi_command(sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL);
+	result = spi_send_command(sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL);
 
 	if (result)
 		printf_debug("%s failed", __func__);
@@ -641,7 +651,7 @@ int spi_write_status_register(int status)
 	    { JEDEC_WRSR, (unsigned char)status };
 
 	/* Send WRSR (Write Status Register) */
-	return spi_command(sizeof(cmd), 0, cmd, NULL);
+	return spi_send_command(sizeof(cmd), 0, cmd, NULL);
 }
 
 void spi_byte_program(int address, uint8_t byte)
@@ -655,7 +665,7 @@ void spi_byte_program(int address, uint8_t byte)
 	};
 
 	/* Send Byte-Program */
-	spi_command(sizeof(cmd), 0, cmd, NULL);
+	spi_send_command(sizeof(cmd), 0, cmd, NULL);
 }
 
 int spi_nbyte_program(int address, uint8_t *bytes, int len)
@@ -676,7 +686,7 @@ int spi_nbyte_program(int address, uint8_t *bytes, int len)
 	memcpy(&cmd[4], bytes, len);
 
 	/* Send Byte-Program */
-	return spi_command(4 + len, 0, cmd, NULL);
+	return spi_send_command(4 + len, 0, cmd, NULL);
 }
 
 int spi_disable_blockprotect(void)
@@ -712,7 +722,7 @@ int spi_nbyte_read(int address, uint8_t *bytes, int len)
 	};
 
 	/* Send Read */
-	return spi_command(sizeof(cmd), len, cmd, bytes);
+	return spi_send_command(sizeof(cmd), len, cmd, bytes);
 }
 
 /*
@@ -855,13 +865,13 @@ int spi_aai_write(struct flashchip *flash, uint8_t *buf)
 	result = spi_write_enable();
 	if (result)
 		return result;
-	spi_command(6, 0, w, NULL);
+	spi_send_command(6, 0, w, NULL);
 	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(5); /* SST25VF040B Tbp is max 10us */
 	while (pos < size) {
 		w[1] = buf[pos++];
 		w[2] = buf[pos++];
-		spi_command(3, 0, w, NULL);
+		spi_send_command(3, 0, w, NULL);
 		while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
 			programmer_delay(5); /* SST25VF040B Tbp is max 10us */
 	}
diff --git a/wbsio_spi.c b/wbsio_spi.c
index 9ac15d1..cbdddd2 100644
--- a/wbsio_spi.c
+++ b/wbsio_spi.c
@@ -90,7 +90,7 @@ int wbsio_check_for_spi(const char *name)
  * Would one more byte of RAM in the chip (to get all 24 bits) really make
  * such a big difference?
  */
-int wbsio_spi_command(unsigned int writecnt, unsigned int readcnt,
+int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		      const unsigned char *writearr, unsigned char *readarr)
 {
 	int i;