This patch adds support for BIOS flashing on the all SiliconImage SATA controllers

It was easy because

1) flashrom has now nice API 2) documentation is public on the web site

Corresponding to flashrom svn r527.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

4 files changed, 31 insertions, 3 deletions

diff --git a/Makefile b/Makefile
index 4cb49cd..ede2481 100644
--- a/Makefile
+++ b/Makefile
@@ -33,7 +33,7 @@ OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.o \
 	sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o physmap.o \
 	flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \
 	ichspi.o w39v040c.o sb600spi.o wbsio_spi.o m29f002.o internal.o \
-	dummyflasher.o pcidev.o nic3com.o
+	dummyflasher.o pcidev.o nic3com.o sata_sii.o
 
 all: pciutils dep $(PROGRAM)
 
diff --git a/flash.h b/flash.h
index d172ac1..71e4e3d 100644
--- a/flash.h
+++ b/flash.h
@@ -83,6 +83,7 @@ extern int programmer;
 #define PROGRAMMER_INTERNAL	0x00
 #define PROGRAMMER_DUMMY	0x01
 #define PROGRAMMER_NIC3COM	0x02
+#define PROGRAMMER_SATASII	0x03
 
 struct programmer_entry {
 	const char *vendor;
@@ -559,6 +560,8 @@ void myusec_calibrate_delay(void);
 /* pcidev.c */
 #define PCI_OK 0
 #define PCI_NT 1    /* Not tested */
+#define PCI_IO_BASE_ADDRESS 0x10
+
 extern uint32_t io_base_addr;
 extern struct pci_access *pacc;
 extern struct pci_filter filter;
@@ -658,6 +661,16 @@ void nic3com_chip_writeb(uint8_t val, chipaddr addr);
 uint8_t nic3com_chip_readb(const chipaddr addr);
 extern struct pcidev_status nics_3com[];
 
+/* satasii.c */
+int satasii_init(void);
+int satasii_shutdown(void);
+void *satasii_map(const char *descr, unsigned long phys_addr, size_t len);
+void satasii_unmap(void *virt_addr, size_t len);
+void satasii_chip_writeb(uint8_t val, chipaddr addr);
+uint8_t satasii_chip_readb(const chipaddr addr);
+extern struct pcidev_status satas_sii[];
+
+
 /* flashrom.c */
 extern int verbose;
 #define printf_debug(x...) { if (verbose) printf(x); }
diff --git a/flashrom.c b/flashrom.c
index 925b05b..fa6e06a 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -74,6 +74,19 @@ const struct programmer_entry programmer_table[] = {
 		.chip_writel		= fallback_chip_writel,
 	},
 
+	{
+		.init			= satasii_init,
+		.shutdown		= satasii_shutdown,
+		.map_flash_region	= satasii_map,
+		.unmap_flash_region	= satasii_unmap,
+		.chip_readb		= satasii_chip_readb,
+		.chip_readw		= fallback_chip_readw,
+		.chip_readl		= fallback_chip_readl,
+		.chip_writeb		= satasii_chip_writeb,
+		.chip_writew		= fallback_chip_writew,
+		.chip_writel		= fallback_chip_writel,
+	},
+
 	{},
 };
 
@@ -503,6 +516,10 @@ int main(int argc, char *argv[])
 				programmer = PROGRAMMER_NIC3COM;
 				if (optarg[7] == '=')
 					pcidev_bdf = strdup(optarg + 8);
+			} else if (strncmp(optarg, "satasii", 7) == 0) {
+				programmer = PROGRAMMER_SATASII;
+				if (optarg[7] == '=')
+					pcidev_bdf = strdup(optarg + 8);
 			} else {
 				printf("Error: Unknown programmer.\n");
 				exit(1);
diff --git a/pcidev.c b/pcidev.c
index 41b5f25..5dab83f 100644
--- a/pcidev.c
+++ b/pcidev.c
@@ -26,8 +26,6 @@
 #include <errno.h>
 #include "flash.h"
 
-#define PCI_IO_BASE_ADDRESS 0x10
-
 uint32_t io_base_addr;
 struct pci_access *pacc;
 struct pci_filter filter;