summaryrefslogtreecommitdiffstats
path: root/sys/dev/nxge/xgehal/xgehal-device-fp.c
blob: 2788e512883cacb6f28f841311bfb51e6cd1aa1b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
/*-
 * Copyright (c) 2002-2007 Neterion, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#ifdef XGE_DEBUG_FP
#include <dev/nxge/include/xgehal-device.h>
#endif

#include <dev/nxge/include/xgehal-ring.h>
#include <dev/nxge/include/xgehal-fifo.h>

/**
 * xge_hal_device_bar0 - Get BAR0 mapped address.
 * @hldev: HAL device handle.
 *
 * Returns: BAR0 address of the specified device.
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE char *
xge_hal_device_bar0(xge_hal_device_t *hldev)
{
	return hldev->bar0;
}

/**
 * xge_hal_device_isrbar0 - Get BAR0 mapped address.
 * @hldev: HAL device handle.
 *
 * Returns: BAR0 address of the specified device.
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE char *
xge_hal_device_isrbar0(xge_hal_device_t *hldev)
{
	return hldev->isrbar0;
}

/**
 * xge_hal_device_bar1 - Get BAR1 mapped address.
 * @hldev: HAL device handle.
 *
 * Returns: BAR1 address of the specified device.
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE char *
xge_hal_device_bar1(xge_hal_device_t *hldev)
{
	return hldev->bar1;
}

/**
 * xge_hal_device_bar0_set - Set BAR0 mapped address.
 * @hldev: HAL device handle.
 * @bar0: BAR0 mapped address.
 * * Set BAR0 address in the HAL device object.
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
xge_hal_device_bar0_set(xge_hal_device_t *hldev, char *bar0)
{
	xge_assert(bar0);
	hldev->bar0 = bar0;
}

/**
 * xge_hal_device_isrbar0_set - Set BAR0 mapped address.
 * @hldev: HAL device handle.
 * @isrbar0: BAR0 mapped address.
 * * Set BAR0 address in the HAL device object.
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
xge_hal_device_isrbar0_set(xge_hal_device_t *hldev, char *isrbar0)
{
	xge_assert(isrbar0);
	hldev->isrbar0 = isrbar0;
}

/**
 * xge_hal_device_bar1_set - Set BAR1 mapped address.
 * @hldev: HAL device handle.
 * @channelh: Channel handle.
 * @bar1: BAR1 mapped address.
 *
 * Set BAR1 address for the given channel.
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
xge_hal_device_bar1_set(xge_hal_device_t *hldev, xge_hal_channel_h channelh,
	           char *bar1)
{
	xge_hal_fifo_t *fifo = (xge_hal_fifo_t *)channelh;

	xge_assert(bar1);
	xge_assert(fifo);

	/* Initializing the BAR1 address as the start of
	 * the FIFO queue pointer and as a location of FIFO control
	 * word. */
	fifo->hw_pair =
	        (xge_hal_fifo_hw_pair_t *) (bar1 +
	            (fifo->channel.post_qid * XGE_HAL_FIFO_HW_PAIR_OFFSET));
	hldev->bar1 = bar1;
}


/**
 * xge_hal_device_rev - Get Device revision number.
 * @hldev: HAL device handle.
 *
 * Returns: Device revision number
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE int
xge_hal_device_rev(xge_hal_device_t *hldev)
{
	    return hldev->revision;
}


/**
 * xge_hal_device_begin_irq - Begin IRQ processing.
 * @hldev: HAL device handle.
 * @reason: "Reason" for the interrupt, the value of Xframe's
 *          general_int_status register.
 *
 * The function performs two actions, It first checks whether (shared IRQ) the
 * interrupt was raised by the device. Next, it masks the device interrupts.
 *
 * Note:
 * xge_hal_device_begin_irq() does not flush MMIO writes through the
 * bridge. Therefore, two back-to-back interrupts are potentially possible.
 * It is the responsibility of the ULD to make sure that only one
 * xge_hal_device_continue_irq() runs at a time.
 *
 * Returns: 0, if the interrupt is not "ours" (note that in this case the
 * device remain enabled).
 * Otherwise, xge_hal_device_begin_irq() returns 64bit general adapter
 * status.
 * See also: xge_hal_device_handle_irq()
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
xge_hal_device_begin_irq(xge_hal_device_t *hldev, u64 *reason)
{
	u64 val64;
	xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;

	hldev->stats.sw_dev_info_stats.total_intr_cnt++;

	val64 = xge_os_pio_mem_read64(hldev->pdev,
	              hldev->regh0, &isrbar0->general_int_status);
	if (xge_os_unlikely(!val64)) {
	    /* not Xframe interrupt */
	    hldev->stats.sw_dev_info_stats.not_xge_intr_cnt++;
	    *reason = 0;
	        return XGE_HAL_ERR_WRONG_IRQ;
	}

	if (xge_os_unlikely(val64 == XGE_HAL_ALL_FOXES)) {
	            u64 adapter_status =
	                    xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	                      &isrbar0->adapter_status);
	            if (adapter_status == XGE_HAL_ALL_FOXES)  {
	                (void) xge_queue_produce(hldev->queueh,
	                     XGE_HAL_EVENT_SLOT_FREEZE,
	                     hldev,
	                     1,  /* critical: slot freeze */
	                     sizeof(u64),
	                     (void*)&adapter_status);
	        *reason = 0;
	        return XGE_HAL_ERR_CRITICAL;
	    }
	}

	*reason = val64;

	/* separate fast path, i.e. no errors */
	if (val64 & XGE_HAL_GEN_INTR_RXTRAFFIC) {
	    hldev->stats.sw_dev_info_stats.rx_traffic_intr_cnt++;
	    return XGE_HAL_OK;
	}
	if (val64 & XGE_HAL_GEN_INTR_TXTRAFFIC) {
	    hldev->stats.sw_dev_info_stats.tx_traffic_intr_cnt++;
	    return XGE_HAL_OK;
	}

	hldev->stats.sw_dev_info_stats.not_traffic_intr_cnt++;
	if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_TXPIC)) {
	    xge_hal_status_e status;
	    hldev->stats.sw_dev_info_stats.txpic_intr_cnt++;
	    status = __hal_device_handle_txpic(hldev, val64);
	    if (status != XGE_HAL_OK) {
	        return status;
	    }
	}

	if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_TXDMA)) {
	    xge_hal_status_e status;
	    hldev->stats.sw_dev_info_stats.txdma_intr_cnt++;
	    status = __hal_device_handle_txdma(hldev, val64);
	    if (status != XGE_HAL_OK) {
	        return status;
	    }
	}

	if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_TXMAC)) {
	    xge_hal_status_e status;
	    hldev->stats.sw_dev_info_stats.txmac_intr_cnt++;
	    status = __hal_device_handle_txmac(hldev, val64);
	    if (status != XGE_HAL_OK) {
	        return status;
	    }
	}

	if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_TXXGXS)) {
	    xge_hal_status_e status;
	    hldev->stats.sw_dev_info_stats.txxgxs_intr_cnt++;
	    status = __hal_device_handle_txxgxs(hldev, val64);
	    if (status != XGE_HAL_OK) {
	        return status;
	    }
	}

	if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_RXPIC)) {
	    xge_hal_status_e status;
	    hldev->stats.sw_dev_info_stats.rxpic_intr_cnt++;
	    status = __hal_device_handle_rxpic(hldev, val64);
	    if (status != XGE_HAL_OK) {
	        return status;
	    }
	}

	if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_RXDMA)) {
	    xge_hal_status_e status;
	    hldev->stats.sw_dev_info_stats.rxdma_intr_cnt++;
	    status = __hal_device_handle_rxdma(hldev, val64);
	    if (status != XGE_HAL_OK) {
	        return status;
	    }
	}

	if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_RXMAC)) {
	    xge_hal_status_e status;
	    hldev->stats.sw_dev_info_stats.rxmac_intr_cnt++;
	    status = __hal_device_handle_rxmac(hldev, val64);
	    if (status != XGE_HAL_OK) {
	        return status;
	    }
	}

	if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_RXXGXS)) {
	    xge_hal_status_e status;
	    hldev->stats.sw_dev_info_stats.rxxgxs_intr_cnt++;
	    status = __hal_device_handle_rxxgxs(hldev, val64);
	    if (status != XGE_HAL_OK) {
	        return status;
	    }
	}

	if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_MC)) {
	    xge_hal_status_e status;
	    hldev->stats.sw_dev_info_stats.mc_intr_cnt++;
	    status = __hal_device_handle_mc(hldev, val64);
	    if (status != XGE_HAL_OK) {
	        return status;
	    }
	}

	return XGE_HAL_OK;
}

/**
 * xge_hal_device_clear_rx - Acknowledge (that is, clear) the
 * condition that has caused the RX interrupt.
 * @hldev: HAL device handle.
 *
 * Acknowledge (that is, clear) the condition that has caused
 * the Rx interrupt.
 * See also: xge_hal_device_begin_irq(), xge_hal_device_continue_irq(),
 * xge_hal_device_clear_tx(), xge_hal_device_mask_rx().
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
xge_hal_device_clear_rx(xge_hal_device_t *hldev)
{
	xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;

	xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	             0xFFFFFFFFFFFFFFFFULL,
	             &isrbar0->rx_traffic_int);
}

/**
 * xge_hal_device_clear_tx - Acknowledge (that is, clear) the
 * condition that has caused the TX interrupt.
 * @hldev: HAL device handle.
 *
 * Acknowledge (that is, clear) the condition that has caused
 * the Tx interrupt.
 * See also: xge_hal_device_begin_irq(), xge_hal_device_continue_irq(),
 * xge_hal_device_clear_rx(), xge_hal_device_mask_tx().
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
xge_hal_device_clear_tx(xge_hal_device_t *hldev)
{
	xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;

	xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	             0xFFFFFFFFFFFFFFFFULL,
	             &isrbar0->tx_traffic_int);
}

/**
 * xge_hal_device_poll_rx_channel - Poll Rx channel for completed
 * descriptors and process the same.
 * @channel: HAL channel.
 * @got_rx: Buffer to return the flag set if receive interrupt is occured
 *
 * The function polls the Rx channel for the completed  descriptors and calls
 * the upper-layer driver (ULD) via supplied completion callback.
 *
 * Returns: XGE_HAL_OK, if the polling is completed successful.
 * XGE_HAL_COMPLETIONS_REMAIN: There are still more completed
 * descriptors available which are yet to be processed.
 *
 * See also: xge_hal_device_poll_tx_channel()
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
xge_hal_device_poll_rx_channel(xge_hal_channel_t *channel, int *got_rx)
{
	xge_hal_status_e ret = XGE_HAL_OK;
	xge_hal_dtr_h first_dtrh;
	xge_hal_device_t *hldev = (xge_hal_device_t *)channel->devh;
	u8 t_code;
	int got_bytes;

	/* for each opened rx channel */
	got_bytes = *got_rx = 0;
	((xge_hal_ring_t *)channel)->cmpl_cnt = 0;
	channel->poll_bytes = 0;
	if ((ret = xge_hal_ring_dtr_next_completed (channel, &first_dtrh,
	    &t_code)) == XGE_HAL_OK) {
	    if (channel->callback(channel, first_dtrh,
	        t_code, channel->userdata) != XGE_HAL_OK) {
	        (*got_rx) += ((xge_hal_ring_t *)channel)->cmpl_cnt + 1;
	        got_bytes += channel->poll_bytes + 1;
	        ret = XGE_HAL_COMPLETIONS_REMAIN;
	    } else {
	        (*got_rx) += ((xge_hal_ring_t *)channel)->cmpl_cnt + 1;
	        got_bytes += channel->poll_bytes + 1;
	    }
	}

	if (*got_rx) {
	    hldev->irq_workload_rxd[channel->post_qid] += *got_rx;
	    hldev->irq_workload_rxcnt[channel->post_qid] ++;
	}
	hldev->irq_workload_rxlen[channel->post_qid] += got_bytes;

	return ret;
}

/**
 * xge_hal_device_poll_tx_channel - Poll Tx channel for completed
 * descriptors and process the same.
 * @channel: HAL channel.
 * @got_tx: Buffer to return the flag set if transmit interrupt is occured
 *
 * The function polls the Tx channel for the completed  descriptors and calls
 * the upper-layer driver (ULD) via supplied completion callback.
 *
 * Returns: XGE_HAL_OK, if the polling is completed successful.
 * XGE_HAL_COMPLETIONS_REMAIN: There are still more completed
 * descriptors available which are yet to be processed.
 *
 * See also: xge_hal_device_poll_rx_channel().
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
xge_hal_device_poll_tx_channel(xge_hal_channel_t *channel, int *got_tx)
{
	xge_hal_dtr_h first_dtrh;
	xge_hal_device_t *hldev = (xge_hal_device_t *)channel->devh;
	u8 t_code;
	int got_bytes;

	/* for each opened tx channel */
	got_bytes = *got_tx = 0;
	channel->poll_bytes = 0;
	if (xge_hal_fifo_dtr_next_completed (channel, &first_dtrh,
	    &t_code) == XGE_HAL_OK) {
	    if (channel->callback(channel, first_dtrh,
	        t_code, channel->userdata) != XGE_HAL_OK) {
	        (*got_tx)++;
	        got_bytes += channel->poll_bytes + 1;
	        return XGE_HAL_COMPLETIONS_REMAIN;
	    }
	    (*got_tx)++;
	    got_bytes += channel->poll_bytes + 1;
	}

	if (*got_tx) {
	    hldev->irq_workload_txd[channel->post_qid] += *got_tx;
	    hldev->irq_workload_txcnt[channel->post_qid] ++;
	}
	hldev->irq_workload_txlen[channel->post_qid] += got_bytes;

	return XGE_HAL_OK;
}

/**
 * xge_hal_device_poll_rx_channels - Poll Rx channels for completed
 * descriptors and process the same.
 * @hldev: HAL device handle.
 * @got_rx: Buffer to return flag set if receive is ready
 *
 * The function polls the Rx channels for the completed descriptors and calls
 * the upper-layer driver (ULD) via supplied completion callback.
 *
 * Returns: XGE_HAL_OK, if the polling is completed successful.
 * XGE_HAL_COMPLETIONS_REMAIN: There are still more completed
 * descriptors available which are yet to be processed.
 *
 * See also: xge_hal_device_poll_tx_channels(), xge_hal_device_continue_irq().
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
xge_hal_device_poll_rx_channels(xge_hal_device_t *hldev, int *got_rx)
{
	xge_list_t *item;
	xge_hal_channel_t *channel;

	/* for each opened rx channel */
	xge_list_for_each(item, &hldev->ring_channels) {
	    if (hldev->terminating)
	        return XGE_HAL_OK;
	    channel = xge_container_of(item, xge_hal_channel_t, item);
	    (void) xge_hal_device_poll_rx_channel(channel, got_rx);
	}

	return XGE_HAL_OK;
}

/**
 * xge_hal_device_poll_tx_channels - Poll Tx channels for completed
 * descriptors and process the same.
 * @hldev: HAL device handle.
 * @got_tx: Buffer to return flag set if transmit is ready
 *
 * The function polls the Tx channels for the completed descriptors and calls
 * the upper-layer driver (ULD) via supplied completion callback.
 *
 * Returns: XGE_HAL_OK, if the polling is completed successful.
 * XGE_HAL_COMPLETIONS_REMAIN: There are still more completed
 * descriptors available which are yet to be processed.
 *
 * See also: xge_hal_device_poll_rx_channels(), xge_hal_device_continue_irq().
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
xge_hal_device_poll_tx_channels(xge_hal_device_t *hldev, int *got_tx)
{
	xge_list_t *item;
	xge_hal_channel_t *channel;

	/* for each opened tx channel */
	xge_list_for_each(item, &hldev->fifo_channels) {
	    if (hldev->terminating)
	        return XGE_HAL_OK;
	    channel = xge_container_of(item, xge_hal_channel_t, item);
	    (void) xge_hal_device_poll_tx_channel(channel, got_tx);
	}

	return XGE_HAL_OK;
}

/**
 * xge_hal_device_mask_tx - Mask Tx interrupts.
 * @hldev: HAL device handle.
 *
 * Mask Tx device interrupts.
 *
 * See also: xge_hal_device_unmask_tx(), xge_hal_device_mask_rx(),
 * xge_hal_device_clear_tx().
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
xge_hal_device_mask_tx(xge_hal_device_t *hldev)
{
	xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;

	xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	               0xFFFFFFFFFFFFFFFFULL,
	               &isrbar0->tx_traffic_mask);
}

/**
 * xge_hal_device_mask_rx - Mask Rx interrupts.
 * @hldev: HAL device handle.
 *
 * Mask Rx device interrupts.
 *
 * See also: xge_hal_device_unmask_rx(), xge_hal_device_mask_tx(),
 * xge_hal_device_clear_rx().
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
xge_hal_device_mask_rx(xge_hal_device_t *hldev)
{
	xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;

	xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	               0xFFFFFFFFFFFFFFFFULL,
	               &isrbar0->rx_traffic_mask);
}

/**
 * xge_hal_device_mask_all - Mask all device interrupts.
 * @hldev: HAL device handle.
 *
 * Mask all device interrupts.
 *
 * See also: xge_hal_device_unmask_all()
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
xge_hal_device_mask_all(xge_hal_device_t *hldev)
{
	xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;

	xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	               0xFFFFFFFFFFFFFFFFULL,
	               &isrbar0->general_int_mask);
}

/**
 * xge_hal_device_unmask_tx - Unmask Tx interrupts.
 * @hldev: HAL device handle.
 *
 * Unmask Tx device interrupts.
 *
 * See also: xge_hal_device_mask_tx(), xge_hal_device_clear_tx().
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
xge_hal_device_unmask_tx(xge_hal_device_t *hldev)
{
	xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;

	xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	               0x0ULL,
	               &isrbar0->tx_traffic_mask);
}

/**
 * xge_hal_device_unmask_rx - Unmask Rx interrupts.
 * @hldev: HAL device handle.
 *
 * Unmask Rx device interrupts.
 *
 * See also: xge_hal_device_mask_rx(), xge_hal_device_clear_rx().
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
xge_hal_device_unmask_rx(xge_hal_device_t *hldev)
{
	xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;

	xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	               0x0ULL,
	               &isrbar0->rx_traffic_mask);
}

/**
 * xge_hal_device_unmask_all - Unmask all device interrupts.
 * @hldev: HAL device handle.
 *
 * Unmask all device interrupts.
 *
 * See also: xge_hal_device_mask_all()
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
xge_hal_device_unmask_all(xge_hal_device_t *hldev)
{
	xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;

	xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	               0x0ULL,
	               &isrbar0->general_int_mask);
}


/**
 * xge_hal_device_continue_irq - Continue handling IRQ: process all
 * completed descriptors.
 * @hldev: HAL device handle.
 *
 * Process completed descriptors and unmask the device interrupts.
 *
 * The xge_hal_device_continue_irq() walks all open channels
 * and calls upper-layer driver (ULD) via supplied completion
 * callback. Note that the completion callback is specified at channel open
 * time, see xge_hal_channel_open().
 *
 * Note that the xge_hal_device_continue_irq is part of the _fast_ path.
 * To optimize the processing, the function does _not_ check for
 * errors and alarms.
 *
 * The latter is done in a polling fashion, via xge_hal_device_poll().
 *
 * Returns: XGE_HAL_OK.
 *
 * See also: xge_hal_device_handle_irq(), xge_hal_device_poll(),
 * xge_hal_ring_dtr_next_completed(),
 * xge_hal_fifo_dtr_next_completed(), xge_hal_channel_callback_f{}.
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
xge_hal_device_continue_irq(xge_hal_device_t *hldev)
{
	int got_rx = 1, got_tx = 1;
	int isr_polling_cnt = hldev->config.isr_polling_cnt;
	int count = 0;

	do
	{
	    if (got_rx)
	        (void) xge_hal_device_poll_rx_channels(hldev, &got_rx);
	    if (got_tx && hldev->tti_enabled)
	        (void) xge_hal_device_poll_tx_channels(hldev, &got_tx);

	    if (!got_rx && !got_tx)
	        break;

	    count += (got_rx + got_tx);
	}while (isr_polling_cnt--);

	if (!count)
	    hldev->stats.sw_dev_info_stats.not_traffic_intr_cnt++;

	return XGE_HAL_OK;
}

/**
 * xge_hal_device_handle_irq - Handle device IRQ.
 * @hldev: HAL device handle.
 *
 * Perform the complete handling of the line interrupt. The function
 * performs two calls.
 * First it uses xge_hal_device_begin_irq() to  check the reason for
 * the interrupt and mask the device interrupts.
 * Second, it calls xge_hal_device_continue_irq() to process all
 * completed descriptors and re-enable the interrupts.
 *
 * Returns: XGE_HAL_OK - success;
 * XGE_HAL_ERR_WRONG_IRQ - (shared) IRQ produced by other device.
 *
 * See also: xge_hal_device_begin_irq(), xge_hal_device_continue_irq().
 */
__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
xge_hal_device_handle_irq(xge_hal_device_t *hldev)
{
	u64 reason;
	xge_hal_status_e status;

	xge_hal_device_mask_all(hldev);

	status = xge_hal_device_begin_irq(hldev, &reason);
	if (status != XGE_HAL_OK) {
	    xge_hal_device_unmask_all(hldev);
	    return status;
	}

	if (reason & XGE_HAL_GEN_INTR_RXTRAFFIC) {
	    xge_hal_device_clear_rx(hldev);
	}

	status = xge_hal_device_continue_irq(hldev);

	xge_hal_device_clear_tx(hldev);

	xge_hal_device_unmask_all(hldev);

	return status;
}

#if defined(XGE_HAL_CONFIG_LRO)


__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL int
__hal_lro_check_for_session_match(lro_t *lro, tcplro_t *tcp, iplro_t *ip)
{

	/* Match Source address field */
	if ((lro->ip_hdr->saddr != ip->saddr))
	    return XGE_HAL_FAIL;

	/* Match Destination address field */
	if ((lro->ip_hdr->daddr != ip->daddr))
	    return XGE_HAL_FAIL;

	/* Match Source Port field */
	if ((lro->tcp_hdr->source != tcp->source))
	    return XGE_HAL_FAIL;

	/* Match Destination Port field */
	if ((lro->tcp_hdr->dest != tcp->dest))
	    return XGE_HAL_FAIL;
	    
	return XGE_HAL_OK;
}

/*
 * __hal_tcp_seg_len: Find the tcp seg len.
 * @ip: ip header.
 * @tcp: tcp header.
 * returns: Tcp seg length.
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL u16
__hal_tcp_seg_len(iplro_t *ip, tcplro_t *tcp)
{
	u16 ret;

	ret =  (xge_os_ntohs(ip->tot_len) -
	       ((ip->version_ihl & 0x0F)<<2) -
	       ((tcp->doff_res)>>2));
	return (ret);
}

/*
 * __hal_ip_lro_capable: Finds whether ip is lro capable.
 * @ip: ip header.
 * @ext_info:  descriptor info.
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
__hal_ip_lro_capable(iplro_t *ip,
	         xge_hal_dtr_info_t *ext_info)
{

#ifdef XGE_LL_DEBUG_DUMP_PKT
	    {
	        u16 i;
	        u8 ch, *iph = (u8 *)ip;

	        xge_debug_ring(XGE_TRACE, "Dump Ip:" );
	        for (i =0; i < 40; i++) {
	            ch = ntohs(*((u8 *)(iph + i)) );
	            printf("i:%d %02x, ",i,ch);
	        }
	    }
#endif

	if (ip->version_ihl != IP_FAST_PATH_HDR_MASK) {
	    xge_debug_ring(XGE_ERR, "iphdr !=45 :%d",ip->version_ihl);
	    return XGE_HAL_FAIL;
	}

	if (ext_info->proto & XGE_HAL_FRAME_PROTO_IP_FRAGMENTED) {
	    xge_debug_ring(XGE_ERR, "IP fragmented");
	    return XGE_HAL_FAIL;
	}

	return XGE_HAL_OK;
}

/*
 * __hal_tcp_lro_capable: Finds whether tcp is lro capable.
 * @ip: ip header.
 * @tcp: tcp header.
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
__hal_tcp_lro_capable(iplro_t *ip, tcplro_t *tcp, lro_t *lro, int *ts_off)
{
#ifdef XGE_LL_DEBUG_DUMP_PKT
	    {
	        u8 ch;
	        u16 i;

	        xge_debug_ring(XGE_TRACE, "Dump Tcp:" );
	        for (i =0; i < 20; i++) {
	            ch = ntohs(*((u8 *)((u8 *)tcp + i)) );
	            xge_os_printf("i:%d %02x, ",i,ch);
	        }
	    }
#endif
	if ((TCP_FAST_PATH_HDR_MASK2 != tcp->ctrl) &&
	    (TCP_FAST_PATH_HDR_MASK3 != tcp->ctrl))
	    goto _exit_fail;

	*ts_off = -1;
	if (TCP_FAST_PATH_HDR_MASK1 != tcp->doff_res) {
	    u16 tcp_hdr_len = tcp->doff_res >> 2; /* TCP header len */
	    u16 off = 20; /* Start of tcp options */
	    int i, diff; 

	    /* Does Packet can contain time stamp */
	    if (tcp_hdr_len < 32) {
	        /*
	         * If the session is not opened, we can consider
	         * this packet for LRO
	         */
	        if (lro == NULL)
	            return XGE_HAL_OK;

	        goto _exit_fail;
	    }

	    /* Ignore No-operation 0x1 */
	    while (((u8 *)tcp)[off] == 0x1)
	        off++;

	    /* Next option == Timestamp */
	    if (((u8 *)tcp)[off] != 0x8) {
	        /*
	         * If the session ie not opened, we can consider
	         * this packet for LRO
	         */
	        if (lro == NULL)
	            return XGE_HAL_OK;

	        goto _exit_fail;
	    }

	    *ts_off = off;
	    if (lro == NULL)
	        return XGE_HAL_OK;

	    /*
	     * Now the session is opened. If the LRO frame doesn't
	     * have time stamp, we cannot consider current packet for
	     * LRO.
	     */
	    if (lro->ts_off == -1) {
	        xge_debug_ring(XGE_ERR, "Pkt received with time stamp after session opened with no time stamp : %02x %02x", tcp->doff_res, tcp->ctrl);
	        return XGE_HAL_FAIL;
	    }

	    /*
	     * If the difference is greater than three, then there are
	     * more options possible.
	     * else, there are two cases:
	     * case 1: remaining are padding bytes.
	     * case 2: remaining can contain options or padding
	     */
	    off += ((u8 *)tcp)[off+1];
	    diff = tcp_hdr_len - off;
	    if (diff > 3) {
	        /*
	         * Probably contains more options.
	         */
	        xge_debug_ring(XGE_ERR, "tcphdr not fastpth : pkt received with tcp options in addition to time stamp after the session is opened %02x %02x ", tcp->doff_res,   tcp->ctrl);
	        return XGE_HAL_FAIL;
	    }

	    for (i = 0; i < diff; i++) {
	        u8 byte = ((u8 *)tcp)[off+i];

	        /* Ignore No-operation 0x1 */
	        if ((byte == 0x0) || (byte == 0x1)) 
	            continue;
	        xge_debug_ring(XGE_ERR, "tcphdr not fastpth : pkt received with tcp options in addition to time stamp after the session is opened %02x %02x ", tcp->doff_res,   tcp->ctrl);
	        return XGE_HAL_FAIL;
	    }
	
	    /*
	     * Update the time stamp of LRO frame.
	     */
	    xge_os_memcpy(((char *)lro->tcp_hdr + lro->ts_off + 2),
	            (char *)((char *)tcp + (*ts_off) + 2), 8);
	}

	return XGE_HAL_OK;

_exit_fail:
	xge_debug_ring(XGE_TRACE,   "tcphdr not fastpth %02x %02x", tcp->doff_res, tcp->ctrl);
	return XGE_HAL_FAIL;

}

/*
 * __hal_lro_capable: Finds whether frame is lro capable.
 * @buffer: Ethernet frame.
 * @ip: ip frame.
 * @tcp: tcp frame.
 * @ext_info: Descriptor info.
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
__hal_lro_capable( u8 *buffer,
	       iplro_t **ip,
	       tcplro_t **tcp,
	   xge_hal_dtr_info_t *ext_info)
{
	u8 ip_off, ip_length;

	if (!(ext_info->proto & XGE_HAL_FRAME_PROTO_TCP)) {
	    xge_debug_ring(XGE_ERR, "Cant do lro %d", ext_info->proto);
	    return XGE_HAL_FAIL;
	}

  if ( !*ip )
  {
#ifdef XGE_LL_DEBUG_DUMP_PKT
	    {
	        u8 ch;
	        u16 i;

	        xge_os_printf("Dump Eth:" );
	        for (i =0; i < 60; i++) {
	            ch = ntohs(*((u8 *)(buffer + i)) );
	            xge_os_printf("i:%d %02x, ",i,ch);
	        }
	    }
#endif

	switch (ext_info->frame) {
	case XGE_HAL_FRAME_TYPE_DIX:
	  ip_off = XGE_HAL_HEADER_ETHERNET_II_802_3_SIZE;
	  break;
	case XGE_HAL_FRAME_TYPE_LLC:
	  ip_off = (XGE_HAL_HEADER_ETHERNET_II_802_3_SIZE   +
	            XGE_HAL_HEADER_802_2_SIZE);
	  break;
	case XGE_HAL_FRAME_TYPE_SNAP:
	  ip_off = (XGE_HAL_HEADER_ETHERNET_II_802_3_SIZE   +
	            XGE_HAL_HEADER_SNAP_SIZE);
	  break;
	default: // XGE_HAL_FRAME_TYPE_IPX, etc.
	  return XGE_HAL_FAIL;
	}


	if (ext_info->proto & XGE_HAL_FRAME_PROTO_VLAN_TAGGED) {
	  ip_off += XGE_HAL_HEADER_VLAN_SIZE;
	}

	/* Grab ip, tcp headers */
	*ip = (iplro_t *)((char*)buffer + ip_off);
  } /* !*ip */

	ip_length = (u8)((*ip)->version_ihl & 0x0F);
	ip_length = ip_length <<2;
	*tcp = (tcplro_t *)((char *)*ip + ip_length);

	xge_debug_ring(XGE_TRACE, "ip_length:%d ip:"XGE_OS_LLXFMT
	       " tcp:"XGE_OS_LLXFMT"", (int)ip_length,
	    (unsigned long long)(ulong_t)*ip, (unsigned long long)(ulong_t)*tcp);

	return XGE_HAL_OK;

}


/*
 * __hal_open_lro_session: Open a new LRO session.
 * @buffer: Ethernet frame.
 * @ip: ip header.
 * @tcp: tcp header.
 * @lro: lro pointer
 * @ext_info: Descriptor info.
 * @hldev: Hal context.
 * @ring_lro: LRO descriptor per rx ring.
 * @slot: Bucket no.
 * @tcp_seg_len: Length of tcp segment.
 * @ts_off: time stamp offset in the packet.
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
__hal_open_lro_session (u8 *buffer, iplro_t *ip, tcplro_t *tcp, lro_t **lro,
	        xge_hal_device_t *hldev, xge_hal_lro_desc_t *ring_lro, int slot,
	  u32 tcp_seg_len, int  ts_off)
{

	lro_t *lro_new = &ring_lro->lro_pool[slot];

	lro_new->in_use         =   1;
	lro_new->ll_hdr         =   buffer;
	lro_new->ip_hdr         =   ip;
	lro_new->tcp_hdr        =   tcp;
	lro_new->tcp_next_seq_num   =   tcp_seg_len + xge_os_ntohl(
	                            tcp->seq);
	lro_new->tcp_seq_num        =   tcp->seq;
	lro_new->tcp_ack_num        =   tcp->ack_seq;
	lro_new->sg_num         =   1;
	lro_new->total_length       =   xge_os_ntohs(ip->tot_len);
	lro_new->frags_len      =   0;
	lro_new->ts_off         =   ts_off;

	hldev->stats.sw_dev_info_stats.tot_frms_lroised++;
	hldev->stats.sw_dev_info_stats.tot_lro_sessions++;

	*lro = ring_lro->lro_recent = lro_new;
	return;
}
/*
 * __hal_lro_get_free_slot: Get a free LRO bucket.
 * @ring_lro: LRO descriptor per ring.
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL int
__hal_lro_get_free_slot (xge_hal_lro_desc_t *ring_lro)
{
	int i;

	for (i = 0; i < XGE_HAL_LRO_MAX_BUCKETS; i++) {
	    lro_t *lro_temp = &ring_lro->lro_pool[i];

	    if (!lro_temp->in_use)
	        return i;
	}
	return -1;  
}

/*
 * __hal_get_lro_session: Gets matching LRO session or creates one.
 * @eth_hdr:    Ethernet header.
 * @ip: ip header.
 * @tcp: tcp header.
 * @lro: lro pointer
 * @ext_info: Descriptor info.
 * @hldev: Hal context.
 * @ring_lro: LRO descriptor per rx ring
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
__hal_get_lro_session (u8 *eth_hdr,
	           iplro_t *ip,
	           tcplro_t *tcp,
	           lro_t **lro,
	           xge_hal_dtr_info_t *ext_info,
	           xge_hal_device_t *hldev,
	           xge_hal_lro_desc_t   *ring_lro,
	           lro_t **lro_end3 /* Valid only when ret=END_3 */)
{
	lro_t *lro_match;
	int i, free_slot = -1;
	u32 tcp_seg_len;
	int ts_off = -1;

	*lro = lro_match = NULL;
	/*
	 * Compare the incoming frame with the lro session left from the 
	 * previous call.  There is a good chance that this incoming frame
	 * matches the lro session.
	 */
	if (ring_lro->lro_recent && ring_lro->lro_recent->in_use)   {
	    if (__hal_lro_check_for_session_match(ring_lro->lro_recent,
	                          tcp, ip)
	                        == XGE_HAL_OK)
	        lro_match = ring_lro->lro_recent;
	}
	
	if (!lro_match) {
	    /*
	     * Search in the pool of LROs for the session that matches 
	     * the incoming frame.
	     */
	    for (i = 0; i < XGE_HAL_LRO_MAX_BUCKETS; i++) {
	        lro_t *lro_temp = &ring_lro->lro_pool[i];

	        if (!lro_temp->in_use) {
	            if (free_slot == -1)
	                free_slot = i;
	            continue;
	        }   

	        if (__hal_lro_check_for_session_match(lro_temp, tcp,
	                          ip) == XGE_HAL_OK) {
	            lro_match = lro_temp;
	            break;
	        }
	    }
	}

	
	if (lro_match) {
	    /*
	     * Matching LRO Session found
	     */         
	    *lro = lro_match;

	    if (lro_match->tcp_next_seq_num != xge_os_ntohl(tcp->seq)) {
	 xge_debug_ring(XGE_ERR,    "**retransmit  **"
	                    "found***");
	        hldev->stats.sw_dev_info_stats.lro_out_of_seq_pkt_cnt++;
	        return XGE_HAL_INF_LRO_END_2;
	    }

	    if (XGE_HAL_OK != __hal_ip_lro_capable(ip, ext_info))
	{
	        return XGE_HAL_INF_LRO_END_2;
	}

	    if (XGE_HAL_OK != __hal_tcp_lro_capable(ip, tcp, lro_match,
	                        &ts_off)) {
	        /*
	         * Close the current session and open a new
	         * LRO session with this packet,
	         * provided it has tcp payload
	         */ 
	        tcp_seg_len = __hal_tcp_seg_len(ip, tcp);
	        if (tcp_seg_len == 0)
	  {
	            return XGE_HAL_INF_LRO_END_2;
	  }

	        /* Get a free bucket  */
	        free_slot = __hal_lro_get_free_slot(ring_lro);
	        if (free_slot == -1)
	  {
	            return XGE_HAL_INF_LRO_END_2;
	  }

	        /* 
	         * Open a new LRO session
	         */
	        __hal_open_lro_session (eth_hdr,    ip, tcp, lro_end3,
	                    hldev, ring_lro, free_slot, tcp_seg_len,
	                    ts_off);

	        return XGE_HAL_INF_LRO_END_3;
	    }

	            /*
	     * The frame is good, in-sequence, can be LRO-ed;
	     * take its (latest) ACK - unless it is a dupack.
	     * Note: to be exact need to check window size as well..
	    */
	    if (lro_match->tcp_ack_num == tcp->ack_seq &&
	        lro_match->tcp_seq_num == tcp->seq) {
	        hldev->stats.sw_dev_info_stats.lro_dup_pkt_cnt++;
	        return XGE_HAL_INF_LRO_END_2;
	    }

	    lro_match->tcp_seq_num = tcp->seq;
	    lro_match->tcp_ack_num = tcp->ack_seq;
	    lro_match->frags_len += __hal_tcp_seg_len(ip, tcp);

	    ring_lro->lro_recent =  lro_match;
	
	    return XGE_HAL_INF_LRO_CONT;
	}

	/* ********** New Session ***************/
	if (free_slot == -1)
	    return XGE_HAL_INF_LRO_UNCAPABLE;
	
	if (XGE_HAL_FAIL == __hal_ip_lro_capable(ip, ext_info))
	    return XGE_HAL_INF_LRO_UNCAPABLE;

	if (XGE_HAL_FAIL == __hal_tcp_lro_capable(ip, tcp, NULL, &ts_off))
	    return XGE_HAL_INF_LRO_UNCAPABLE;
	    
	xge_debug_ring(XGE_TRACE, "Creating lro session.");

	/*
	 * Open a LRO session, provided the packet contains payload.
	 */
	tcp_seg_len = __hal_tcp_seg_len(ip, tcp);
	if (tcp_seg_len == 0)
	    return XGE_HAL_INF_LRO_UNCAPABLE;

	__hal_open_lro_session (eth_hdr,    ip, tcp, lro, hldev, ring_lro, free_slot,
	            tcp_seg_len, ts_off);

	return XGE_HAL_INF_LRO_BEGIN;
}

/*
 * __hal_lro_under_optimal_thresh: Finds whether combined session is optimal.
 * @ip: ip header.
 * @tcp: tcp header.
 * @lro: lro pointer
 * @hldev: Hal context.
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
__hal_lro_under_optimal_thresh (iplro_t *ip,
	                tcplro_t *tcp,
	            lro_t *lro,
	            xge_hal_device_t *hldev)
{
	if (!lro) return XGE_HAL_FAIL;

	if ((lro->total_length + __hal_tcp_seg_len(ip, tcp) ) > 
	                    hldev->config.lro_frm_len) {
	    xge_debug_ring(XGE_TRACE, "Max LRO frame len exceeded:"
	     "max length %d ", hldev->config.lro_frm_len);
	    hldev->stats.sw_dev_info_stats.lro_frm_len_exceed_cnt++;
	    return XGE_HAL_FAIL;
	}

	if (lro->sg_num == hldev->config.lro_sg_size) {
	    xge_debug_ring(XGE_TRACE, "Max sg count exceeded:"
	             "max sg %d ", hldev->config.lro_sg_size);
	    hldev->stats.sw_dev_info_stats.lro_sg_exceed_cnt++;
	    return XGE_HAL_FAIL;
	}

	return XGE_HAL_OK;
}

/*
 * __hal_collapse_ip_hdr: Collapses ip header.
 * @ip: ip header.
 * @tcp: tcp header.
 * @lro: lro pointer
 * @hldev: Hal context.
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
__hal_collapse_ip_hdr ( iplro_t *ip,
	        tcplro_t *tcp,
	        lro_t *lro,
	        xge_hal_device_t *hldev)
{

	lro->total_length += __hal_tcp_seg_len(ip, tcp);

	/* May be we have to handle time stamps or more options */

	return XGE_HAL_OK;

}

/*
 * __hal_collapse_tcp_hdr: Collapses tcp header.
 * @ip: ip header.
 * @tcp: tcp header.
 * @lro: lro pointer
 * @hldev: Hal context.
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
__hal_collapse_tcp_hdr ( iplro_t *ip,
	         tcplro_t *tcp,
	         lro_t *lro,
	         xge_hal_device_t *hldev)
{
	lro->tcp_next_seq_num += __hal_tcp_seg_len(ip, tcp);
	return XGE_HAL_OK;

}

/*
 * __hal_append_lro: Appends new frame to existing LRO session.
 * @ip: ip header.
 * @tcp: IN tcp header, OUT tcp payload.
 * @seg_len: tcp payload length.
 * @lro: lro pointer
 * @hldev: Hal context.
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
__hal_append_lro(iplro_t *ip,
	     tcplro_t **tcp,
	     u32 *seg_len,
	     lro_t *lro,
	     xge_hal_device_t *hldev)
{
	(void) __hal_collapse_ip_hdr(ip, *tcp,  lro, hldev);
	(void) __hal_collapse_tcp_hdr(ip, *tcp, lro, hldev);
	// Update mbuf chain will be done in ll driver.
	// xge_hal_accumulate_large_rx on success of appending new frame to
	// lro will return to ll driver tcpdata pointer, and tcp payload length.
	// along with return code lro frame appended.

	lro->sg_num++;
	*seg_len = __hal_tcp_seg_len(ip, *tcp);
	*tcp = (tcplro_t *)((char *)*tcp    + (((*tcp)->doff_res)>>2));

	return XGE_HAL_OK;

}

/**
 * __xge_hal_accumulate_large_rx:   LRO a given frame
 * frames
 * @ring: rx ring number
 * @eth_hdr: ethernet header.
 * @ip_hdr: ip header (optional)
 * @tcp: tcp header.
 * @seglen: packet length.
 * @p_lro: lro pointer.
 * @ext_info: descriptor info, see xge_hal_dtr_info_t{}.
 * @hldev: HAL device.
 * @lro_end3: for lro_end3 output
 *
 * LRO the newly received frame, i.e. attach it (if possible) to the
 * already accumulated (i.e., already LRO-ed) received frames (if any),
 * to form one super-sized frame for the subsequent processing
 * by the stack.
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
xge_hal_lro_process_rx(int ring, u8 *eth_hdr, u8 *ip_hdr, tcplro_t **tcp,
	                   u32 *seglen, lro_t **p_lro,
	                   xge_hal_dtr_info_t *ext_info, xge_hal_device_t *hldev,
	                   lro_t **lro_end3)
{
	iplro_t *ip = (iplro_t *)ip_hdr;
	xge_hal_status_e ret;
	lro_t *lro;

	xge_debug_ring(XGE_TRACE, "Entered accumu lro. ");
	if (XGE_HAL_OK != __hal_lro_capable(eth_hdr, &ip, (tcplro_t **)tcp,
	                                  ext_info))
	    return XGE_HAL_INF_LRO_UNCAPABLE;

	/*
	 * This function shall get matching LRO or else
	 * create one and return it
	 */
	ret = __hal_get_lro_session(eth_hdr, ip, (tcplro_t *)*tcp,
	                          p_lro, ext_info, hldev,   &hldev->lro_desc[ring],
	                          lro_end3);
	xge_debug_ring(XGE_TRACE, "ret from get_lro:%d ",ret);
	lro = *p_lro;
	if (XGE_HAL_INF_LRO_CONT == ret) {
	    if (XGE_HAL_OK == __hal_lro_under_optimal_thresh(ip,
	                    (tcplro_t *)*tcp, lro, hldev)) {
	        (void) __hal_append_lro(ip,(tcplro_t **) tcp, seglen,
	                         lro, hldev);
	        hldev->stats.sw_dev_info_stats.tot_frms_lroised++;

	        if (lro->sg_num >= hldev->config.lro_sg_size) {
	            hldev->stats.sw_dev_info_stats.lro_sg_exceed_cnt++;
	            ret = XGE_HAL_INF_LRO_END_1;
	        }

	    } else ret = XGE_HAL_INF_LRO_END_2;
	}

	/*
	 * Since its time to flush,
	 * update ip header so that it can be sent up
	 */
	if ((ret == XGE_HAL_INF_LRO_END_1) ||
	    (ret == XGE_HAL_INF_LRO_END_2) ||
	    (ret == XGE_HAL_INF_LRO_END_3)) {
	    lro->ip_hdr->tot_len = xge_os_htons((*p_lro)->total_length);
	    lro->ip_hdr->check = xge_os_htons(0);
	    lro->ip_hdr->check = XGE_LL_IP_FAST_CSUM(((u8 *)(lro->ip_hdr)),
	                (lro->ip_hdr->version_ihl & 0x0F));
	    lro->tcp_hdr->ack_seq = lro->tcp_ack_num;
	}

	return (ret);
}

/**
 * xge_hal_accumulate_large_rx: LRO a given frame
 * frames
 * @buffer: Ethernet frame.
 * @tcp: tcp header.
 * @seglen: packet length.
 * @p_lro: lro pointer.
 * @ext_info: descriptor info, see xge_hal_dtr_info_t{}.
 * @hldev: HAL device.
 * @lro_end3: for lro_end3 output
 *
 * LRO the newly received frame, i.e. attach it (if possible) to the
 * already accumulated (i.e., already LRO-ed) received frames (if any),
 * to form one super-sized frame for the subsequent processing
 * by the stack.
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
xge_hal_accumulate_large_rx(u8 *buffer, tcplro_t **tcp, u32 *seglen,
lro_t **p_lro, xge_hal_dtr_info_t *ext_info, xge_hal_device_t *hldev,
lro_t **lro_end3)
{
  int ring = 0;
  return xge_hal_lro_process_rx(ring, buffer, NULL, tcp, seglen, p_lro,
	                            ext_info, hldev, lro_end3);
}

/**
 * xge_hal_lro_close_session: Close LRO session
 * @lro: LRO Session.
 * @hldev: HAL Context.
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
xge_hal_lro_close_session (lro_t *lro)
{
	lro->in_use = 0;
}

/**
 * xge_hal_lro_next_session: Returns next LRO session in the list or NULL
 *                  if none exists.
 * @hldev: HAL Context.
 * @ring: rx ring number.
 */
__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL lro_t *
xge_hal_lro_next_session (xge_hal_device_t *hldev, int ring)
{
xge_hal_lro_desc_t *ring_lro = &hldev->lro_desc[ring];
	int i;
	int start_idx = ring_lro->lro_next_idx;

	for(i = start_idx; i < XGE_HAL_LRO_MAX_BUCKETS; i++) {
	    lro_t *lro = &ring_lro->lro_pool[i];

	    if (!lro->in_use)
	        continue;

	    lro->ip_hdr->tot_len = xge_os_htons(lro->total_length);
	    lro->ip_hdr->check = xge_os_htons(0);
	    lro->ip_hdr->check = XGE_LL_IP_FAST_CSUM(((u8 *)(lro->ip_hdr)),
	                            (lro->ip_hdr->version_ihl & 0x0F));
	    ring_lro->lro_next_idx  = i + 1;
	    return lro;
	}

	ring_lro->lro_next_idx  = 0;
	return NULL;

}

__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL lro_t *
xge_hal_lro_get_next_session(xge_hal_device_t *hldev)
{
  int ring = 0; /* assume default ring=0 */
  return xge_hal_lro_next_session(hldev, ring);
}
#endif
OpenPOWER on IntegriCloud