1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
|
/*-
* Copyright (c) 2000 Doug Rabson
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/ipl.h>
#include <sys/ktr.h>
#include <sys/proc.h>
#include <sys/lock.h>
#include <sys/malloc.h>
#include <sys/mutex.h>
#include <sys/kernel.h>
#include <sys/smp.h>
#include <sys/sysctl.h>
#include <vm/vm.h>
#include <vm/pmap.h>
#include <vm/vm_map.h>
#include <sys/user.h>
#include <sys/dkstat.h>
#include <machine/atomic.h>
#include <machine/globaldata.h>
#include <machine/pmap.h>
#include <machine/rpb.h>
#include <machine/clock.h>
/* Set to 1 once we're ready to let the APs out of the pen. */
static volatile int aps_ready = 0;
static struct mtx ap_boot_mtx;
u_int boot_cpu_id;
/*
* Communicate with a console running on a secondary processor.
* Return 1 on failure.
*/
static int
smp_send_secondary_command(const char *command, int cpuid)
{
u_int64_t mask = 1L << cpuid;
struct pcs *cpu = LOCATE_PCS(hwrpb, cpuid);
int i, len;
/*
* Sanity check.
*/
len = strlen(command);
if (len > sizeof(cpu->pcs_buffer.rxbuf)) {
printf("smp_send_secondary_command: command '%s' too long\n",
command);
return 0;
}
/*
* Wait for the rx bit to clear.
*/
for (i = 0; i < 100000; i++) {
if (!(hwrpb->rpb_rxrdy & mask))
break;
DELAY(10);
}
if (hwrpb->rpb_rxrdy & mask)
return 0;
/*
* Write the command into the processor's buffer.
*/
bcopy(command, cpu->pcs_buffer.rxbuf, len);
cpu->pcs_buffer.rxlen = len;
/*
* Set the bit in the rxrdy mask and let the secondary try to
* handle the command.
*/
atomic_set_64(&hwrpb->rpb_rxrdy, mask);
/*
* Wait for the rx bit to clear.
*/
for (i = 0; i < 100000; i++) {
if (!(hwrpb->rpb_rxrdy & mask))
break;
DELAY(10);
}
if (hwrpb->rpb_rxrdy & mask)
return 0;
return 1;
}
void
smp_init_secondary(void)
{
struct pcs *cpu;
/* spin until all the AP's are ready */
while (!aps_ready)
/*spin*/ ;
/*
* Record the globaldata pointer in the per-cpu system value.
*/
alpha_pal_wrval((u_int64_t) globalp);
/*
* Point interrupt/exception vectors to our own.
*/
alpha_pal_wrent(XentInt, ALPHA_KENTRY_INT);
alpha_pal_wrent(XentArith, ALPHA_KENTRY_ARITH);
alpha_pal_wrent(XentMM, ALPHA_KENTRY_MM);
alpha_pal_wrent(XentIF, ALPHA_KENTRY_IF);
alpha_pal_wrent(XentUna, ALPHA_KENTRY_UNA);
alpha_pal_wrent(XentSys, ALPHA_KENTRY_SYS);
/* lower the ipl and take any pending machine check */
mc_expected = 1;
alpha_mb(); alpha_mb();
alpha_pal_wrmces(7);
(void)alpha_pal_swpipl(ALPHA_PSL_IPL_HIGH);
mc_expected = 0;
/*
* Set curproc to our per-cpu idleproc so that mutexes have
* something unique to lock with.
*/
PCPU_SET(curproc, PCPU_GET(idleproc));
PCPU_SET(spinlocks, NULL);
/*
* Set flags in our per-CPU slot in the HWRPB.
*/
cpu = LOCATE_PCS(hwrpb, PCPU_GET(cpuid));
cpu->pcs_flags &= ~PCS_BIP;
cpu->pcs_flags |= PCS_RC;
alpha_mb();
/*
* XXX: doesn't idleproc already have a pcb from when it was
* kthread_create'd?
*
* cache idleproc's physical address.
*/
curproc->p_md.md_pcbpaddr = (struct pcb *)PCPU_GET(idlepcbphys);
/*
* and make idleproc's trapframe pointer point to its
* stack pointer for sanity.
*/
curproc->p_md.md_tf =
(struct trapframe *)globalp->gd_idlepcb.apcb_ksp;
mtx_lock_spin(&ap_boot_mtx);
smp_cpus++;
CTR0(KTR_SMP, "smp_init_secondary");
PCPU_SET(other_cpus, all_cpus & ~(1 << PCPU_GET(cpuid)));
printf("SMP: AP CPU #%d Launched!\n", PCPU_GET(cpuid));
if (smp_cpus == mp_ncpus) {
smp_started = 1;
smp_active = 1;
}
mtx_unlock_spin(&ap_boot_mtx);
while (smp_started == 0)
alpha_mb(); /* nothing */
microuptime(PCPU_PTR(switchtime));
PCPU_SET(switchticks, ticks);
/* ok, now grab sched_lock and enter the scheduler */
(void)alpha_pal_swpipl(ALPHA_PSL_IPL_0);
mtx_lock_spin(&sched_lock);
cpu_throw(); /* doesn't return */
panic("scheduler returned us to " __func__);
}
extern void smp_init_secondary_glue(void);
static int
smp_start_secondary(int cpuid)
{
struct pcs *cpu = LOCATE_PCS(hwrpb, cpuid);
struct pcs *bootcpu = LOCATE_PCS(hwrpb, boot_cpu_id);
struct alpha_pcb *pcb = (struct alpha_pcb *) cpu->pcs_hwpcb;
struct globaldata *globaldata;
int i;
size_t sz;
if ((cpu->pcs_flags & PCS_PV) == 0) {
printf("smp_start_secondary: cpu %d PALcode invalid\n", cpuid);
return 0;
}
if (bootverbose)
printf("smp_start_secondary: starting cpu %d\n", cpuid);
sz = round_page(UPAGES * PAGE_SIZE);
globaldata = malloc(sz, M_TEMP, M_NOWAIT);
if (!globaldata) {
printf("smp_start_secondary: can't allocate memory\n");
return 0;
}
globaldata_init(globaldata, cpuid, sz);
/*
* Copy the idle pcb and setup the address to start executing.
* Use the pcb unique value to point the secondary at its globaldata
* structure.
*/
*pcb = globaldata->gd_idlepcb;
pcb->apcb_unique = (u_int64_t)globaldata;
hwrpb->rpb_restart = (u_int64_t) smp_init_secondary_glue;
hwrpb->rpb_restart_val = (u_int64_t) smp_init_secondary_glue;
hwrpb->rpb_checksum = hwrpb_checksum();
/*
* Tell the cpu to start with the same PALcode as us.
*/
bcopy(&bootcpu->pcs_pal_rev, &cpu->pcs_pal_rev,
sizeof cpu->pcs_pal_rev);
/*
* Set flags in cpu structure and push out write buffers to
* make sure the secondary sees it.
*/
cpu->pcs_flags |= PCS_CV|PCS_RC;
cpu->pcs_flags &= ~PCS_BIP;
alpha_mb();
/*
* Fire it up and hope for the best.
*/
if (!smp_send_secondary_command("START\r\n", cpuid)) {
printf("smp_start_secondary: can't send START command\n");
free(globaldata, M_TEMP);
return 0;
}
/*
* Wait for the secondary to set the BIP flag in its structure.
*/
for (i = 0; i < 100000; i++) {
if (cpu->pcs_flags & PCS_BIP)
break;
DELAY(10);
}
if (!(cpu->pcs_flags & PCS_BIP)) {
printf("smp_start_secondary: secondary did not respond\n");
free(globaldata, M_TEMP);
}
/*
* It worked (I think).
*/
if (bootverbose)
printf("smp_start_secondary: cpu %d started\n", cpuid);
return 1;
}
/* Other stuff */
int
cpu_mp_probe(void)
{
struct pcs *pcsp;
int i, cpus;
/* XXX: Need to check for valid platforms here. */
/* Make sure we have at least one secondary CPU. */
cpus = 0;
for (i = 0; i < hwrpb->rpb_pcs_cnt; i++) {
if (i == PCPU_GET(cpuid))
continue;
pcsp = (struct pcs *)((char *)hwrpb + hwrpb->rpb_pcs_off +
(i * hwrpb->rpb_pcs_size));
if ((pcsp->pcs_flags & PCS_PP) == 0)
continue;
if ((pcsp->pcs_flags & PCS_PA) == 0)
continue;
if ((pcsp->pcs_flags & PCS_PV) == 0)
continue;
if (i > MAXCPU)
continue;
cpus++;
}
return (cpus);
}
void
cpu_mp_start()
{
int i;
mtx_init(&ap_boot_mtx, "ap boot", MTX_SPIN);
mp_ncpus = 1;
boot_cpu_id = PCPU_GET(cpuid);
KASSERT(boot_cpu_id == hwrpb->rpb_primary_cpu_id,
("mp_start() called on non-primary CPU"));
all_cpus = 1 << boot_cpu_id;
for (i = 0; i < hwrpb->rpb_pcs_cnt; i++) {
struct pcs *pcsp;
if (i == boot_cpu_id)
continue;
pcsp = (struct pcs *)((char *)hwrpb + hwrpb->rpb_pcs_off +
(i * hwrpb->rpb_pcs_size));
if ((pcsp->pcs_flags & PCS_PP) == 0)
continue;
if ((pcsp->pcs_flags & PCS_PA) == 0) {
if (bootverbose)
printf("CPU %d not available.\n", i);
continue;
}
if ((pcsp->pcs_flags & PCS_PV) == 0) {
if (bootverbose)
printf("CPU %d does not have valid PALcode.\n",
i);
continue;
}
if (i > MAXCPU) {
if (bootverbose) {
printf("CPU %d not supported.", i);
printf(" Only %d CPUs supported.\n", MAXCPU);
}
continue;
}
all_cpus |= 1 << i;
mp_ncpus++;
}
PCPU_SET(other_cpus, all_cpus & ~(1 << boot_cpu_id));
for (i = 0; i < hwrpb->rpb_pcs_cnt; i++) {
if (i == boot_cpu_id)
continue;
if (all_cpus & 1 << i)
smp_start_secondary(i);
}
}
void
cpu_mp_announce()
{
}
/*
* send an IPI to a set of cpus.
*/
void
ipi_selected(u_int32_t cpus, u_int64_t ipi)
{
struct globaldata *globaldata;
CTR2(KTR_SMP, "ipi_selected: cpus: %x ipi: %lx", cpus, ipi);
alpha_mb();
while (cpus) {
int cpuid = ffs(cpus) - 1;
cpus &= ~(1 << cpuid);
globaldata = globaldata_find(cpuid);
if (globaldata) {
atomic_set_64(&globaldata->gd_pending_ipis, ipi);
alpha_mb();
CTR1(KTR_SMP, "calling alpha_pal_wripir(%d)", cpuid);
alpha_pal_wripir(cpuid);
}
}
}
/*
* send an IPI INTerrupt containing 'vector' to all CPUs, including myself
*/
void
ipi_all(u_int64_t ipi)
{
ipi_selected(all_cpus, ipi);
}
/*
* send an IPI to all CPUs EXCEPT myself
*/
void
ipi_all_but_self(u_int64_t ipi)
{
ipi_selected(PCPU_GET(other_cpus), ipi);
}
/*
* send an IPI to myself
*/
void
ipi_self(u_int64_t ipi)
{
ipi_selected(1 << PCPU_GET(cpuid), ipi);
}
/*
* Handle an IPI sent to this processor.
*/
void
smp_handle_ipi(struct trapframe *frame)
{
u_int64_t ipis = atomic_readandclear_64(PCPU_PTR(pending_ipis));
u_int64_t ipi;
int cpumask;
cpumask = 1 << PCPU_GET(cpuid);
CTR1(KTR_SMP, "smp_handle_ipi(), ipis=%lx", ipis);
while (ipis) {
/*
* Find the lowest set bit.
*/
ipi = ipis & ~(ipis - 1);
ipis &= ~ipi;
switch (ipi) {
case IPI_INVLTLB:
CTR0(KTR_SMP, "IPI_NVLTLB");
ALPHA_TBIA();
break;
case IPI_RENDEZVOUS:
CTR0(KTR_SMP, "IPI_RENDEZVOUS");
smp_rendezvous_action();
break;
case IPI_AST:
CTR0(KTR_SMP, "IPI_AST");
break;
case IPI_STOP:
CTR0(KTR_SMP, "IPI_STOP");
atomic_set_int(&stopped_cpus, cpumask);
while ((started_cpus & cpumask) == 0)
alpha_mb();
atomic_clear_int(&started_cpus, cpumask);
atomic_clear_int(&stopped_cpus, cpumask);
break;
}
}
/*
* Dump console messages to the console. XXX - we need to handle
* requests to provide PALcode to secondaries and to start up new
* secondaries that are added to the system on the fly.
*/
if (PCPU_GET(cpuid) == boot_cpu_id) {
u_int cpuid;
u_int64_t txrdy;
#ifdef DIAGNOSTIC
struct pcs *cpu;
char buf[81];
#endif
alpha_mb();
while (hwrpb->rpb_txrdy != 0) {
cpuid = ffs(hwrpb->rpb_txrdy) - 1;
#ifdef DIAGNOSTIC
cpu = LOCATE_PCS(hwrpb, cpuid);
bcopy(&cpu->pcs_buffer.txbuf, buf,
cpu->pcs_buffer.txlen);
buf[cpu->pcs_buffer.txlen] = '\0';
printf("SMP From CPU%d: %s\n", cpuid, buf);
#endif
do {
txrdy = hwrpb->rpb_txrdy;
} while (atomic_cmpset_64(&hwrpb->rpb_txrdy, txrdy,
txrdy & ~(1 << cpuid)) == 0);
}
}
}
static void
release_aps(void *dummy __unused)
{
if (bootverbose)
printf(__func__ ": releasing secondary CPUs\n");
atomic_store_rel_int(&aps_ready, 1);
}
SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL);
|