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<TITLE>TrueTime GPS/GOES/OMEGA Receivers
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<BODY>
<H3>
TrueTime GPS/GOES/OMEGA Receivers</H3>
<HR>
<H4>
Synopsis</H4>
Address: 127.127.5.<I>u</I>
<BR>Reference ID: <TT>GPS, OMEGA, GOES</TT>
<BR>Driver ID: <TT>TRUETIME</TT>
<BR>Serial Port: <TT>/dev/true<I>u</I></TT>; 9600 baud, 8-bits, no parity
<BR>Features: <TT>tty_clk</TT>
<H4>
Description</H4>
This driver supports several models models of Kinemetrics/TrueTime timing
receivers, including 468-DC MK III GOES Synchronized Clock, GPS- DC MK
III and GPS/TM-TMD GPS Synchronized Clock, XL-DC (a 151-602-210, reported
by the driver as a GPS/TM-TMD), GPS-800 TCU (an 805-957 with the RS232
Talker/Listener module), OM-DC OMEGA Synchronized Clock, and very likely
others in the same model family that use the same timecode formats.
<P>Most of this code is originally from refclock_wwvb.c with thanks. It
has been so mangled that wwvb is not a recognizable ancestor.
<PRE>Timcode format: ADDD:HH:MM:SSQCL
A - control A (this is stripped before we see it)
Q - Quality indication (see below)
C - Carriage return
L - Line feed
Quality codes indicate possible error of
468-DC GOES Receiver:
GPS-TM/TMD Receiver:
? +/- 500 milliseconds # +/- 50 milliseconds
* +/- 5 milliseconds . +/- 1 millisecond
space less than 1 millisecond
OM-DC OMEGA Receiver:
> +/- 5 seconds
? +/- 500 milliseconds # +/- 50 milliseconds
* +/- 5 milliseconds . +/- 1 millisecond
A-H less than 1 millisecond. Character indicates which
station
is being received as follows: A = Norway, B = Liberia,
C = Hawaii, D = North Dakota, E = La Reunion, F =
Argentina,
G = Australia, H = Japan.</PRE>
The carriage return start bit begins on 0 seconds and extends to 1 bit
time.
<P>Notes on 468-DC and OMEGA receiver:
<P>Send the clock a <TT>R</TT> or <TT>C</TT> and once per second a timestamp
will appear. Send a <TT>R</TT> to get the satellite position once (GOES
only).
<P>Notes on the 468-DC receiver:
<P>Since the old east/west satellite locations are only historical, you
can't set your clock propagation delay settings correctly and still use
automatic mode. The manual says to use a compromise when setting the switches.
This results in significant errors. The solution; use fudge time1 and time2
to incorporate corrections. If your clock is set for 50 and it should be
58 for using the west and 46 for using the east, use the line
<P><TT>fudge 127.127.5.0 time1 +0.008 time2 -0.004</TT>
<P>This corrects the 4 milliseconds advance and 8 milliseconds retard needed.
The software will ask the clock which satellite it sees.
<P>The PCL720 from PC Labs has an Intel 8253 look-alike, as well as a bunch
of TTL input and output pins, all brought out to the back panel. If you
wire a PPS signal (such as the TTL PPS coming out of a GOES or other Kinemetrics/Truetime
clock) to the 8253's GATE0, and then also wire the 8253's OUT0 to the PCL720's
INPUT3.BIT0, then we can read CTR0 to get the number of microseconds since
the last PPS upward edge, mediated by reading OUT0 to find out if the counter
has wrapped around (this happens if more than 65535us (65ms) elapses between
the PPS event and our being called.)
<H4>
Monitor Data</H4>
When enabled by the <TT>flag4</TT> fudge flag, every received timecode
is written as-is to the <TT>clockstats</TT> file.
<H4>
Fudge Factors</H4>
<DL>
<DT>
<TT>time1 <I>time</I></TT></DT>
<DD>
Specifies the time offset calibration factor, in seconds and fraction,
to be used for the West satellite, with default 0.0.</DD>
<DT>
<TT>time2 <I>time</I></TT></DT>
<DD>
. Specifies the time offset calibration factor, in seconds and fraction,
to be used for the East satellite, with default 0.0.</DD>
<DT>
<TT>stratum <I>number</I></TT></DT>
<DD>
Specifies the driver stratum, in decimal from 0 to 15, with default 0.</DD>
<DT>
<TT>refid <I>string</I></TT></DT>
<DD>
Specifies the driver reference identifier, an ASCII string from one to
four characters, with default <TT>TRUE</TT>.</DD>
<DT>
<TT>flag1 0 | 1</TT></DT>
<DD>
Silence the clock side of ntpd, just reading the clock without trying to
write to it.</DD>
<DT>
<TT>flag2 0 | 1</TT></DT>
<DD>
Generate a debug file /tmp/true%d.</DD>
<DT>
<TT>flag3 0 | 1</TT></DT>
<DD>
Not used by this driver.</DD>
<DT>
<TT>flag4 0 | 1</TT></DT>
<DD>
Not used by this driver.</DD>
</DL>
Additional Information
<P><A HREF="refclock.htm">Reference Clock Drivers</A>
<HR>
<ADDRESS>
David L. Mills (mills@udel.edu)</ADDRESS>
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