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path: root/usr.sbin/bhyve/xmsr.c
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* Emulate MSR 0xC0011024 when running on AMD processors.neel2015-02-241-0/+9
* Don't advertise the "OS visible workarounds" feature in cpuid.80000001H:ECX.neel2014-10-191-0/+25
* Don't advertise the Instruction Based Sampling feature because it requiresneel2014-10-171-0/+13
* Hide extended PerfCtr MSRs on AMD processors by clearing bits 23, 24 and 28 inneel2014-10-171-0/+37
* Emulate the "Hardware Configuration" MSR when running on an AMD host.neel2014-10-161-2/+27
* Support Intel-specific MSRs that are accessed when booting up a linux in bhyve:neel2014-10-091-0/+7
* Restructure the MSR handling so it is entirely handled by processor-specificneel2014-09-201-10/+61
* Ignore writes to microcode update MSR. This MSR is accessed by RHEL7 guest.neel2014-04-301-0/+2
* Add an option to ignore accesses by the guest to unimplemented MSRs.neel2013-12-191-2/+15
* Add an explicit exit code 'SPINUP_AP' to tell the controlling process that anneel2012-09-251-218/+5
* Ignore legacy INIT de-asserts in x2apic mode before verifyinggrehan2011-10-181-3/+3
* First cut to port bhyve, vmmctl, and libvmmapi to HEAD.jhb2011-05-151-1/+1
* Import of bhyve hypervisor and utilities, part 1.grehan2011-05-131-0/+261
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