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* MFC r302504, r302666, r302668, r302932, r302933:mav2016-08-181-0/+3
| | | | | | | | | | Add emulation for Intel e1000 (e82545) network adapter. The code was successfully tested with FreeBSD, Linux, Solaris and Windows guests. This interface is predictably slower (about 2x) then virtio-net, but it is very helpful for guests not supporting virtio-net by default. Thanks to Jeremiah Lott and Peter Grehan for doing original heavy lifting.
* Import bhyve_graphics into CURRENT. Thanks to all who testedgrehan2016-07-041-1/+14
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this on the branch. Original commit message: Initial bhyve native graphics support. This adds emulations for a raw framebuffer device, PS2 keyboard/mouse, XHCI USB controller and a USB tablet. A simple VNC server is provided for keyboard/mouse input, and graphics output. A VGA emulation is included, but is currently disconnected until an additional bhyve change to block out VGA memory is committed. Credits: - raw framebuffer, VNC server, XHCI controller, USB bus/device emulation and UEFI f/w support by Leon Dang - VGA, console/g, initial VNC server by tychon@ - PS2 keyboard/mouse jointly done by tychon@ and Leon Dang - hypervisor framebuffer mem support by neel@ Tested by: Michael Dexter, in a number of revisions of this code. With the appropriate UEFI image, FreeBSD, Windows and Linux guests can installed and run in graphics mode using the UEFI/GOP framebuffer. Approved by: re (gjb)
| * Create branch for bhyve graphics import.grehan2016-05-271-55/+0
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* Don't use SYSDIR to avoid conflicts with existing usage.grehan2016-04-201-2/+2
| | | | | | | Also, use SRCTOP to locate the top of the source tree instead of a relative path. PR: 208856
* MFHgjb2016-04-111-1/+3
|\ | | | | | | Sponsored by: The FreeBSD Foundation
| * Allow the location of the kernel source tree to be overridden.grehan2016-04-101-1/+3
| | | | | | | | | | This makes it easier for the bhyve executable to be built out of the tree.
* | Merge from headbapt2015-10-091-0/+1
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| * Simple sysctl-like firmware query interface. Similar in operationgrehan2015-10-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | to the qemu one, and uses the same i/o ports but with different messaging. Requires the 'bootrom' option to be enabled. This is used by UEFI (and potentially other BIOSs/firmware) to request information from bhyve. Currently, only the number of vCPUs is made available, with more to follow. A very large thankyou to Ben Perrault who helped out testing an earlier version of this, and bhyve/Windows in general. Reviewed by: tychon Discussed with: neel Sponsored by: Nahanni Systems
* | Merge from head @274131bapt2015-06-201-0/+1
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| * Restructure memory allocation in bhyve to support "devmem".neel2015-06-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | devmem is used to represent MMIO devices like the boot ROM or a VESA framebuffer where doing a trap-and-emulate for every access is impractical. devmem is a hybrid of system memory (sysmem) and emulated device models. devmem is mapped in the guest address space via nested page tables similar to sysmem. However the address range where devmem is mapped may be changed by the guest at runtime (e.g. by reprogramming a PCI BAR). Also devmem is usually mapped RO or RW as compared to RWX mappings for sysmem. Each devmem segment is named (e.g. "bootrom") and this name is used to create a device node for the devmem segment (e.g. /dev/vmm/testvm.bootrom). The device node supports mmap(2) and this decouples the host mapping of devmem from its mapping in the guest address space (which can change). Reviewed by: tychon Discussed with: grehan Differential Revision: https://reviews.freebsd.org/D2762 MFC after: 4 weeks
* | Merge from headbapt2015-05-031-1/+1
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| * Fix overlinking in bhyve:bapt2015-04-091-1/+1
| | | | | | | | libvmmapi is actually needed to be linked to libutil, not bhyve nor bhyveload
* | Make FreeBSD-bhyve an indivual packagebapt2015-03-051-0/+1
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* Convert usr.sbin to LIBADDbapt2014-11-251-3/+2
| | | | Reduce overlinking
* Move the ACPI PM timer emulation into vmm.ko.neel2014-10-261-1/+0
| | | | | | | | | This reduces variability during timer calibration by keeping the emulation "close" to the guest. Additionally having all timer emulations in the kernel will ease the transition to a per-VM clock source (as opposed to using the host's uptime keep track of time). Discussed with: grehan
* Add emulation for legacy x86 task switching mechanism.neel2014-07-161-0/+1
| | | | | | | FreeBSD/i386 uses task switching to handle double fault exceptions and this change enables that to work. Reported by: glebius
* Implement a PCI interrupt router to route PCI legacy INTx interrupts tojhb2014-05-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the legacy 8259A PICs. - Implement an ICH-comptabile PCI interrupt router on the lpc device with 8 steerable pins configured via config space access to byte-wide registers at 0x60-63 and 0x68-6b. - For each configured PCI INTx interrupt, route it to both an I/O APIC pin and a PCI interrupt router pin. When a PCI INTx interrupt is asserted, ensure that both pins are asserted. - Provide an initial routing of PCI interrupt router (PIRQ) pins to 8259A pins (ISA IRQs) and initialize the interrupt line config register for the corresponding PCI function with the ISA IRQ as this matches existing hardware. - Add a global _PIC method for OSPM to select the desired interrupt routing configuration. - Update the _PRT methods for PCI bridges to provide both APIC and legacy PRT tables and return the appropriate table based on the configured routing configuration. Note that if the lpc device is not configured, no routing information is provided. - When the lpc device is enabled, provide ACPI PCI link devices corresponding to each PIRQ pin. - Add a VMM ioctl to adjust the trigger mode (edge vs level) for 8259A pins via the ELCR. - Mark the power management SCI as level triggered. - Don't hardcode the number of elements in Packages in the source for the DSDT. iasl(8) will fill in the actual number of elements, and this makes it simpler to generate a Package with a variable number of elements. Reviewed by: tycho
* Provide a very basic stub for the 8042 PS/2 keyboard controller.tychon2014-04-251-0/+1
| | | | | Reviewed by: jhb Approved by: neel (co-mentor)
* Add support for the virtio RNG entropy-source device.grehan2014-04-021-0/+1
| | | | | | | | | | | | Call through to /dev/random synchronously to fill virtio buffers with RNG data. Tested with FreeBSD-CURRENT and Ubuntu guests. Submitted by: Leon Dang Discussed with: markm MFC after: 3 weeks Sponsored by: Nahanni Systems
* Move the atpit device model from userspace into vmm.ko for bettertychon2014-03-251-1/+0
| | | | | | precision and lower latency. Approved by: grehan (co-mentor)
* Replace the userspace atpic stub with a more functional vmm.ko model.tychon2014-03-111-2/+0
| | | | | | | | New ioctls VM_ISA_ASSERT_IRQ, VM_ISA_DEASSERT_IRQ and VM_ISA_PULSE_IRQ can be used to manipulate the pic, and optionally the ioapic, pin state. Reviewed by: jhb, neel Approved by: neel (co-mentor)
* Add SMBIOS support.tychon2014-03-041-0/+1
| | | | | | | A new option, -U, can be used to set the UUID in the System Information (Type 1) structure. Manpage fix to follow. Approved by: grehan (co-mentor)
* Enhance the support for PCI legacy INTx interrupts and enable them injhb2014-01-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | the virtio backends. - Add a new ioctl to export the count of pins on the I/O APIC from vmm to the hypervisor. - Use pins on the I/O APIC >= 16 for PCI interrupts leaving 0-15 for ISA interrupts. - Populate the MP Table with I/O interrupt entries for any PCI INTx interrupts. - Create a _PRT table under the PCI root bridge in ACPI to route any PCI INTx interrupts appropriately. - Track which INTx interrupts are in use per-slot so that functions that share a slot attempt to distribute their INTx interrupts across the four available pins. - Implicitly mask INTx interrupts if either MSI or MSI-X is enabled and when the INTx DIS bit is set in a function's PCI command register. Either assert or deassert the associated I/O APIC pin when the state of one of those conditions changes. - Add INTx support to the virtio backends. - Always advertise the MSI capability in the virtio backends. Submitted by: neel (7) Reviewed by: neel MFC after: 2 weeks
* Cosmetic change - switch over to vertical SRCS to make itgrehan2014-01-031-5/+31
| | | | | | easier to keep files in alpha order. Reviewed by: neel
* Support soft power-off via the ACPI S5 state for bhyve guests.jhb2013-12-241-1/+1
| | | | | | | | | | | | | | | | | - Implement the PM1_EVT and PM1_CTL registers required by ACPI. The PM1_EVT register is mostly a dummy as bhyve doesn't support any of the hardware-initiated events. The only bit of PM1_CNT that is implemented are the sleep request bits (SPL_EN and SLP_TYP) which request a graceful power off for S5. In particular, for S5, bhyve exits with a non-zero value which terminates the loop in vmrun.sh. - Emulate the Reset Control register at I/O port 0xcf9 and advertise it as the reset register via ACPI. - Advertise an _S5 package. - Extend the in/out interface to allow an in/out handler to request that the hypervisor trigger a reset or power-off. - While here, note that all vCPUs in a guest support C1 ("hlt"). Reviewed by: neel (earlier version)
* bhyve(8) man page.grehan2013-12-131-2/+1
| | | | | | | mdoc formatting and much input and review from Warren Block (wblock@). Reviewed by: many MFC after: 3 days
* Move the ioapic device model from userspace into vmm.ko. This is needed forneel2013-11-121-1/+1
| | | | | | | | | | upcoming in-kernel device emulations like the HPET. The ioctls VM_IOAPIC_ASSERT_IRQ and VM_IOAPIC_DEASSERT_IRQ are used to manipulate the ioapic pin state. Discussed with: grehan@ Submitted by: Tycho Nightingale (tycho.nightingale@pluribusnetworks.com)
* Add support for PCI-to-ISA LPC bridge emulation. If the LPC bus is attachedneel2013-10-291-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | to a virtual machine then we implicitly create COM1 and COM2 ISA devices. Prior to this change the only way of attaching a COM port to the virtual machine was by presenting it as a PCI device that is mapped at the legacy I/O address 0x3F8 or 0x2F8. There were some issues with the original approach: - It did not work at all with UEFI because UEFI will reprogram the PCI device BARs and remap the COM1/COM2 ports at non-legacy addresses. - OpenBSD GENERIC kernel does not create a /dev/console because it expects the uart device at the legacy 0x3F8/0x2F8 address to be an ISA device. - It was functional with a FreeBSD guest but caused the console to appear on /dev/ttyu2 which was not intuitive. The uart emulation is now independent of the bus on which it resides. Thus it is possible to have uart devices on the PCI bus in addition to the legacy COM1/COM2 devices behind the LPC bus. The command line option to attach ISA COM1/COM2 ports to a virtual machine is "-s <bus>,lpc -l com1,stdio". The command line option to create a PCI-attached uart device is: "-s <bus>,uart[,stdio]" The command line option to create PCI-attached COM1/COM2 device is: "-S <bus>,uart[,stdio]". This style of creating COM ports is deprecated. Discussed with: grehan Reviewed by: grehan Submitted by: Tycho Nightingale (tycho.nightingale@pluribusnetworks.com) M share/examples/bhyve/vmrun.sh AM usr.sbin/bhyve/legacy_irq.c AM usr.sbin/bhyve/legacy_irq.h M usr.sbin/bhyve/Makefile AM usr.sbin/bhyve/uart_emul.c M usr.sbin/bhyve/bhyverun.c AM usr.sbin/bhyve/uart_emul.h M usr.sbin/bhyve/pci_uart.c M usr.sbin/bhyve/pci_emul.c M usr.sbin/bhyve/inout.c M usr.sbin/bhyve/pci_emul.h M usr.sbin/bhyve/inout.h AM usr.sbin/bhyve/pci_lpc.c AM usr.sbin/bhyve/pci_lpc.h
* Parse the memory size parameter using expand_number() to allow specifyingneel2013-10-091-2/+2
| | | | | | | | the memory size more intuitively (e.g. 512M, 4G etc). Submitted by: rodrigc Reviewed by: grehan Approved by: re (blanket)
* Hook up the AHCI and blockif code to the build.grehan2013-10-041-2/+2
| | | | Approved by: re@ (blanket)
* Major rework of the virtio code. Split out common parts, and modifygrehan2013-07-171-1/+1
| | | | | | | the net/block devices accordingly. Submitted by: Chris Torek torek at torek dot net Reviewed by: grehan
* Remove dangling ISA uart stubs.grehan2013-04-051-1/+1
| | | | Obtained from: NetApp
* Install <dev/agp/agpreg.h> and <dev/pci/pcireg.h> as userland headersjhb2013-02-051-2/+0
| | | | | | in /usr/include. MFC after: 2 weeks
* Rename fbsdrun.* -> bhyverun.*grehan2012-12-131-1/+1
| | | | | | | | | bhyve is intended to be a generic hypervisor, and not FreeBSD-specific. (renaming internal routines will come later) Reviewed by: neel Obtained from: NetApp
* Revamp the x86 instruction emulation in bhyve.neel2012-11-281-1/+4
| | | | | | | | | | | | | | | | | | | On a nested page table fault the hypervisor will: - fetch the instruction using the guest %rip and %cr3 - decode the instruction in 'struct vie' - emulate the instruction in host kernel context for local apic accesses - any other type of mmio access is punted up to user-space (e.g. ioapic) The decoded instruction is passed as collateral to the user-space process that is handling the PAGING exit. The emulation code is fleshed out to include more addressing modes (e.g. SIB) and more types of operands (e.g. imm8). The source code is unified into a single file (vmm_instruction_emul.c) that is compiled into vmm.ko as well as /usr/sbin/bhyve. Reviewed by: grehan Obtained from: NetApp
* ACPI support for bhyve.grehan2012-11-201-3/+5
| | | | | | | | | | | | | | | | | The -A option will create the minimal set of required ACPI tables in guest memory. Since ACPI mandates an IOAPIC, the -I option must also be used. Template ASL files are created, and then passed to the iasl compiler to generate AML files. These are then loaded into guest physical mem. In support of this, the ACPI PM timer is implemented, in 32-bit mode. Tested on 7.4/8.*/9.*/10-CURRENT. Reviewed by: neel Obtained from: NetApp Discussed with: jhb (a long while back)
* Remove mptable generation code from libvmmapi and move it to bhyve.grehan2012-10-261-1/+1
| | | | | | | | | | | | Firmware tables require too much knowledge of system configuration, and it's difficult to pass that information in general terms to a library. The upcoming ACPI work exposed this - it will also livein bhyve. Also, remove code specific to NetApp from the mptable name, and remove the -n option from bhyve. Reviewed by: neel Obtained from: NetApp
* Rework how guest MMIO regions are dealt with.grehan2012-10-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - New memory region interface. An RB tree holds the regions, with a last-found per-vCPU cache to deal with the common case of repeated guest accesses to MMIO registers in the same page. - Support memory-mapped BARs in PCI emulation. mem.c/h - memory region interface instruction_emul.c/h - remove old region interface. Use gpa from EPT exit to avoid a tablewalk to determine operand address. Determine operand size and use when calling through to region handler. fbsdrun.c - call into region interface on paging exit. Distinguish between instruction emul error and region not found pci_emul.c/h - implement new BAR callback api. Split BAR alloc routine into routines that require/don't require the BAR phys address. ioapic.c pci_passthru.c pci_virtio_block.c pci_virtio_net.c pci_uart.c - update to new BAR callback i/f Reviewed by: neel Obtained from: NetApp
* Add an explicit exit code 'SPINUP_AP' to tell the controlling process that anneel2012-09-251-0/+1
| | | | | | | | | | AP needs to be activated by spinning up an execution context for it. The local apic emulation is now completely done in the hypervisor and it will detect writes to the ICR_LO register that try to bring up the AP. In response to such writes it will return to userspace with an exit code of SPINUP_AP. Reviewed by: grehan
* Device model for ioapic emulation.neel2012-08-051-1/+1
| | | | | | With this change the uart emulation is entirely interrupt driven. Obtained from: NetApp
* Add 16550 uart emulation as a PCI device. This allows it togrehan2012-05-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | be activated as part of the slot config options. The syntax is: -s <slotnum>,uart[,stdio] The stdio parameter instructs the code to perform i/o using stdin/stdout. It can only be used for one instance. To allow legacy i/o ports/irqs to be used, a new variant of the slot command, -S, is introduced. When used to specify a slot, the device will use legacy resources if it supports them; otherwise it will be treated the same as the '-s' option. Specifying the -S option with the uart will first use the 0x3f8/irq 4 config, and the second -S will use 0x2F8/irq 3. Interrupt delivery is awaiting the arrival of the i/o apic code, but this works fine in uart(4)'s polled mode. This code was written by Cynthia Lu @ MIT while an intern at NetApp, with further work from neel@ and grehan@. Obtained from: NetApp
* MSI-x interrupt support for PCI pass-thru devices.grehan2012-04-281-1/+2
| | | | | | | | | | Includes instruction emulation for memory r/w access. This opens the door for io-apic, local apic, hpet timer, and legacy device emulation. Submitted by: ryan dot berryhill at sandvine dot com Reviewed by: grehan Obtained from: Sandvine
* First cut to port bhyve, vmmctl, and libvmmapi to HEAD.jhb2011-05-151-0/+2
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* Import of bhyve hypervisor and utilities, part 1.grehan2011-05-131-0/+18
vmm.ko - kernel module for VT-x, VT-d and hypervisor control bhyve - user-space sequencer and i/o emulation vmmctl - dump of hypervisor register state libvmm - front-end to vmm.ko chardev interface bhyve was designed and implemented by Neel Natu. Thanks to the following folk from NetApp who helped to make this available: Joe CaraDonna Peter Snyder Jeff Heller Sandeep Mann Steve Miller Brian Pawlowski
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