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* MFC r302783:badger2016-08-182-2/+3
* MFC r303712:kib2016-08-101-0/+210
* MFC r303490, r303491:royger2016-08-032-24/+10
* MFC r302635:royger2016-07-152-5/+34
* Add a tunable to disable migration of MSI-X interrupts.jhb2016-06-241-0/+14
* Use M_NOWAIT when allocating memory for the ACPI wakeup handler.markj2016-06-231-1/+1
* Trim some spaces to record correct commit message for the r301278.kib2016-06-031-2/+2
* diff --git a/sys/x86/x86/local_apic.c b/sys/x86/x86/local_apic.ckib2016-06-031-1/+1
* Implement _ALIGN() using internal integer types.ed2016-05-311-2/+2
* Add missing dependency on <machine/_limits.h>.ed2016-05-311-2/+4
* Add missing dependency on <machine/_limits.h>.ed2016-05-311-0/+2
* hyperv/vmbus: Rename ISR functionssephe2016-05-311-1/+0
* Only calibrate ICR read loop when not in x2APIC mode. Run-timekib2016-05-261-13/+15
* Implement support for RF_UNMAPPED and bus_map/unmap_resource on x86.jhb2016-05-201-30/+114
* Add an EARLY_AP_STARTUP option to start APs earlier during boot.jhb2016-05-145-1/+42
* Remove the extra _RD as _RDTUN already includes it.bz2016-05-131-1/+1
* We already turn the AMD erratum383 workaround on for certain VM_GUEST_VMbz2016-05-131-1/+2
* Allow orm(4) to be disabled from probing/attaching by a hints entry:bz2016-05-101-0/+3
* Remove misc NULL checks after M_WAITOK allocations.trasz2016-05-101-2/+0
* Add a new bus method to fetch device-specific CPU sets.jhb2016-05-092-1/+22
* Work around (ignore) broken SRAT tablesvangyzen2016-05-031-2/+6
* Revert bus_get_cpus() for now.jhb2016-05-033-23/+2
* Add a new bus method to fetch device-specific CPU sets.jhb2016-05-023-2/+23
* atrtc: export function to set RTCroyger2016-05-021-21/+28
* sys: use our roundup2/rounddown2() macros when param.h is available.pfg2016-04-211-2/+2
* SRAT: Don't overflow domain_pxm tablecem2016-04-201-5/+6
* X86: use our nitems() macro when it is avaliable through param.h.pfg2016-04-193-4/+4
* Add hw.dmar.batch_coalesce tunable/sysctl, which specifies rate atkib2016-04-173-2/+20
* Add x86 CPU features definitions published in the Intel SDM rev. 58.kib2016-04-162-2/+26
* Always calculate divisor for the counter mode of LAPIC timer. Even ifkib2016-04-151-15/+34
* busdma/bounce: revert r292255royger2016-04-151-12/+44
* x86: for pointers replace 0 with NULL.pfg2016-04-141-2/+2
* Deprecate using hints.acpi.0.rsdp to communicate the RSDP to theimp2016-04-141-0/+11
* re-enable AMD Topology extension on certain models if disabled by BIOSavg2016-04-123-13/+29
* Cleanup unnecessary semicolons from the kernel.pfg2016-04-101-1/+1
* Add more fine-grained kernel options for NUMA support.jhb2016-04-091-20/+35
* xen: Set ipi_{alloc,free} even for UPsephe2016-04-071-2/+2
* x86: Allow interrupt vector allocation/free even on UPsephe2016-04-071-4/+4
* x86 topo: add some comments, descriptions and references to documentationavg2016-04-051-3/+72
* new x86 smp topology detection codeavg2016-04-041-275/+490
* Move i386/i386/autoconf.c to sys/x86/x86 and use it on both amd64 and i386.jhb2016-04-031-0/+164
* Style(9), use tabs for the #define LOOPS line.kib2016-04-011-5/+4
* Type of the interrupt handlers on x86 cannot be expressed in C.kib2016-03-291-0/+7
* Fix several bugs in r297374:kib2016-03-291-5/+13
* Calibrate the frequency of the of the native_lapic_ipi_wait() loop,kib2016-03-291-15/+40
* Use ANSI function definition.kib2016-03-291-1/+1
* Do not load LAPIC_DCR_TIMER with an undefined value. If we are in thekib2016-03-281-3/+6
* Use TSC deadline mode for LAPIC timer, when available. The mode fireskib2016-03-281-58/+150
* Add defines for the LAPIC TSC deadline timer mode. The LVT timer modekib2016-03-282-3/+6
* Enable interrupts on the BSP once all PICs are initialized.jhb2016-03-241-0/+15
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