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authorkib <kib@FreeBSD.org>2016-05-26 09:09:11 +0000
committerkib <kib@FreeBSD.org>2016-05-26 09:09:11 +0000
commitc6def020485d27e5ee7f9009a2829f2543b5ce46 (patch)
tree0aabc9156432ca68da632c227d492e01853197e9 /sys/x86
parent9a6095a09215bccd41757b8fcc1cc2b66229da7e (diff)
downloadFreeBSD-src-c6def020485d27e5ee7f9009a2829f2543b5ce46.zip
FreeBSD-src-c6def020485d27e5ee7f9009a2829f2543b5ce46.tar.gz
Only calibrate ICR read loop when not in x2APIC mode. Run-time
switching between LAPIC modes is not supported, and there is no need to wait for IPI ack in x2APIC mode. So the calibrated delay is only needed for !x2APIC. This saves around a second of boot time on the real hardware for x2APIC. Sponsored by: The FreeBSD Foundation
Diffstat (limited to 'sys/x86')
-rw-r--r--sys/x86/x86/local_apic.c28
1 files changed, 15 insertions, 13 deletions
diff --git a/sys/x86/x86/local_apic.c b/sys/x86/x86/local_apic.c
index 0a77679..d8bda77 100644
--- a/sys/x86/x86/local_apic.c
+++ b/sys/x86/x86/local_apic.c
@@ -525,19 +525,21 @@ native_lapic_init(vm_paddr_t addr)
*/
KASSERT((cpu_feature & CPUID_TSC) != 0 && tsc_freq != 0,
("TSC not initialized"));
- r = rdtsc();
- for (rx = 0; rx < LOOPS; rx++) {
- (void)lapic_read_icr_lo();
- ia32_pause();
- }
- r = rdtsc() - r;
- r1 = tsc_freq * LOOPS;
- r2 = r * 1000000;
- lapic_ipi_wait_mult = r1 >= r2 ? r1 / r2 : 1;
- if (bootverbose) {
- printf("LAPIC: ipi_wait() us multiplier %ju (r %ju tsc %ju)\n",
- (uintmax_t)lapic_ipi_wait_mult, (uintmax_t)r,
- (uintmax_t)tsc_freq);
+ if (!x2apic_mode) {
+ r = rdtsc();
+ for (rx = 0; rx < LOOPS; rx++) {
+ (void)lapic_read_icr_lo();
+ ia32_pause();
+ }
+ r = rdtsc() - r;
+ r1 = tsc_freq * LOOPS;
+ r2 = r * 1000000;
+ lapic_ipi_wait_mult = r1 >= r2 ? r1 / r2 : 1;
+ if (bootverbose) {
+ printf("LAPIC: ipi_wait() us multiplier %ju (r %ju "
+ "tsc %ju)\n", (uintmax_t)lapic_ipi_wait_mult,
+ (uintmax_t)r, (uintmax_t)tsc_freq);
+ }
}
#undef LOOPS
#endif /* SMP */
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