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* Set the initial system time to a sane (as in: not end of 21st century) value ...brueffer2015-06-291-1/+1
* Add x86 PT_GETFSBASE, PT_GETGSBASE machine-depended ptrace requests tokib2015-06-291-0/+4
* Split the DMAR unit domains and contexts. Domains carry address spacekib2015-06-268-623/+839
* Merge ACPICA 20150619.jkim2015-06-181-2/+2
* Handle X2APIC entries in the MADT for APICs with an ID < 255. At least onejhb2015-06-091-32/+65
* Update print_INTEL_TLB() by the tag values from the Intel SDMkib2015-06-061-3/+180
* Remove several write-only variables, all reported by the gcc 4.9kib2015-05-292-9/+3
* Explicitely enable queued invalidation completion interrupt when thekib2015-05-291-0/+2
* xen: make sure xenpv bus is the last to attachroyger2015-05-251-1/+6
* CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than tenjkim2015-05-221-1/+1
* When sleeping in Sx state using MWAIT instruction, accept fast wakeupkib2015-05-191-6/+17
* Update the comments to match what the code ended up becoming.adrian2015-05-151-1/+1
* Rewrite amd64 PCID implementation to follow an algorithm described inkib2015-05-092-11/+10
* If x86 CPU implementation of the MWAIT instruction reasonablykib2015-05-092-2/+34
* xen: introduce a newbus function to allocate unused memoryroyger2015-05-081-0/+84
* Add initial memory locality cost awareness to the VM, and includeadrian2015-05-081-6/+120
* Add macros for AMD-specific bits in MSR_EFER: LMSLE, FFXSR and TCE.neel2015-05-061-1/+4
* Remove support for Xen PV domU kernels. Support for HVM domU kernelsjhb2015-04-308-88/+5
* Microsoft vmbus, storage and other related driver enhancements for HyperV.whu2015-04-291-0/+1
* The add_bounce_page() function can be called when loading physicalhselasky2015-04-281-2/+2
* Move common code from sys/i386/i386/mp_machdep.c andkib2015-04-241-0/+1120
* Reassign copyright statements on several files from Advancedjhb2015-04-234-4/+4
* Move some common code from sys/amd64/amd64/machdep.c andkib2015-04-221-0/+533
* Refine the workaround for Intel HSD131 [1] added in r269052:marius2015-04-191-8/+17
* Revert unrelated chunk from the r281707.kib2015-04-181-1/+0
* Remove lazy pmap switch code from i386. Naive benchmark with md(4)kib2015-04-182-19/+1
* Add config option PAE_TABLES for the i386 kernel. It switches pmap tokib2015-04-131-1/+1
* Fix build on i386.jkim2015-04-121-1/+1
* Move the 32-bit compatible procfs types from freebsd32.h to <sys/procfs.h>jhb2015-04-081-0/+1
* Account for the offset of the page run when allocating thekib2015-04-083-21/+32
* When mapping an allocated entry, use the entry size, instead of thekib2015-03-241-1/+1
* Assert that the mapping loop makes progress.kib2015-03-241-0/+1
* Use VT-d interrupt remapping block (IR) to perform FSB messageskib2015-03-1916-40/+921
* Provide definitions for all descriptors types in the DMAR invalidationkib2015-03-191-6/+21
* Fix syntax error.kib2015-03-191-1/+1
* When initial placement of the new entry crosses the boundary,kib2015-03-171-2/+4
* When inserting new entry into the address map, ensure that not onlykib2015-03-171-1/+2
* Add x86 specific APIs 'lapic_ipi_alloc()' and 'lapic_ipi_free()' to allow IPIneel2015-03-143-7/+104
* Free up the IPI slot used by IPI_STOP_HARD.neel2015-03-011-1/+6
* Since all generations of Intel CPUs have errata which causes hang onkib2015-02-271-5/+10
* xen/intr: fix fallout from r278854royger2015-02-261-14/+23
* Implements EOI suppression mode, where LAPIC on EOI command forkib2015-02-263-6/+89
* For now, disable x2APIC mode when Xen is detected, even if CPUkib2015-02-251-0/+2
* Revert r276949 and redo the fix for PCIe/PCI bridges, which do notkib2015-02-211-6/+26
* Fix build on i386 without "device apic"tijl2015-02-201-0/+9
* Fix UP build.kib2015-02-181-1/+2
* Initialize x2APIC mode on the resume path before accessing LAPIC.kib2015-02-162-1/+1
* xen/intr: improve handling of legacy IRQsroyger2015-02-161-3/+19
* xen/intr: improve PIRQ handlingroyger2015-02-161-20/+29
* Detect whether x2APIC on VMWare is usable without interruptkib2015-02-142-0/+18
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