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path: root/sys/x86/iommu/intel_utils.c
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* Add hw.dmar.batch_coalesce tunable/sysctl, which specifies rate atkib2016-04-171-0/+4
* Split the DMAR unit domains and contexts. Domains carry address spacekib2015-06-261-27/+21
* Use VT-d interrupt remapping block (IR) to perform FSB messageskib2015-03-191-0/+52
* vm_page_lookup() accepts read-locked object.kib2015-02-111-4/+2
* Right now, for non-coherent DMARs, page table update code flushes thekib2015-01-111-5/+31
* Pull in r267961 and r267973 again. Fix for issues reported will follow.hselasky2014-06-281-5/+4
* Revert r267961, r267973:gjb2014-06-271-4/+5
* Extend the meaning of the CTLFLAG_TUN flag to automatically check ifhselasky2014-06-271-5/+4
* Re-implement the DMAR I/O MMU code in terms of PCI RIDsrstone2014-04-011-2/+5
* Revert PCI RID changes.rstone2014-04-011-5/+2
* Re-implement the DMAR I/O MMU code in terms of PCI RIDsrstone2014-04-011-2/+5
* Add support for queued invalidation.kib2013-11-011-19/+20
* Import the driver for VT-d DMAR hardware, as specified in the revisionkib2013-10-281-0/+562
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