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path: root/sys/x86/iommu/intel_dmar.h
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* Account for the offset of the page run when allocating thekib2015-04-081-1/+1
* Use VT-d interrupt remapping block (IR) to perform FSB messageskib2015-03-191-5/+52
* Right now, for non-coherent DMARs, page table update code flushes thekib2015-01-111-1/+4
* Re-implement the DMAR I/O MMU code in terms of PCI RIDsrstone2014-04-011-7/+4
* Revert PCI RID changes.rstone2014-04-011-4/+7
* Re-implement the DMAR I/O MMU code in terms of PCI RIDsrstone2014-04-011-7/+4
* Add support for the PCI(e)-PCI bridges to the Intel VT-d driver. Thekib2014-03-181-1/+1
* Add support for queued invalidation.kib2013-11-011-7/+68
* Import the driver for VT-d DMAR hardware, as specified in the revisionkib2013-10-281-0/+374
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