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* Revert "Revert "MFC ↵Luiz Souza2018-02-234-5/+19
| | | | | | r328083,328096,328116,328119,328120,328128,328135,328153,328157,"" This reverts commit d3d59b01294138e59995b31d2bcbbbdf45e26a3c.
* Revert "Revert "MFC r327964:""Luiz Souza2018-02-232-0/+23
| | | | This reverts commit 35c91cb80e59124ecb53b65180b4ae555f96dac6.
* Revert "Revert "MFC r323822 (by cem):""Luiz Souza2018-02-232-0/+8
| | | | This reverts commit faf16174043b793fa12aaaf6f113a31cb1ae7968.
* Revert "Revert "MFC r327469:""Luiz Souza2018-02-231-0/+1
| | | | This reverts commit 5f4df31f14dd09c55ee2ada616c797a9273270ef.
* Revert "Revert "MFC r327118:""Luiz Souza2018-02-231-0/+1
| | | | This reverts commit 7eddfe2723939683f87c79dac52507b6878a4017.
* Revert "Revert "MFC r327597:""Luiz Souza2018-02-231-1/+2
| | | | This reverts commit 38b302a111c25b2ca850c0ce8761761b2c48164a.
* Revert "Revert "MFC 322323 by jkim""Luiz Souza2018-02-231-0/+1
| | | | This reverts commit b634270605d0823a7110d2385de63e1e3a74f786.
* Revert "Revert "MFC: r322076""Luiz Souza2018-02-231-0/+1
| | | | This reverts commit 0e1196dbc1e6a616d1e59153b028626daa2a9063.
* Revert "MFC: r322076"Luiz Souza2018-02-211-1/+0
| | | | This reverts commit f43c3967e3e3ee580a8542614291b6c1c93eed96.
* Revert "MFC 322323 by jkim"Luiz Souza2018-02-211-1/+0
| | | | This reverts commit cf2b1f5568d7328668ab821286d6b946275f8d6f.
* Revert "MFC r327597:"Luiz Souza2018-02-211-2/+1
| | | | This reverts commit baf97fd773b0e19536ce41d9325f923f68da228e.
* Revert "MFC r327118:"Luiz Souza2018-02-211-1/+0
| | | | This reverts commit 4766afb923cc9718a46119776ce2c47de644df8c.
* Revert "MFC r327469:"Luiz Souza2018-02-211-1/+0
| | | | This reverts commit f5e0fba2ae028c37a9c910c9244b6828f782851c.
* Revert "MFC r323822 (by cem):"Luiz Souza2018-02-212-8/+0
| | | | This reverts commit f203cac76577ea45b9cd11818d169a0848443507.
* Revert "MFC r327964:"Luiz Souza2018-02-212-23/+0
| | | | This reverts commit 75492dc7653f9d5eb0e33bc8277957739f587ff0.
* Revert "MFC r328083,328096,328116,328119,328120,328128,328135,328153,328157,"Luiz Souza2018-02-214-19/+5
| | | | This reverts commit 430a2bea3907149b30cc75fc722b6cf1f81da82a.
* MFC r328083,328096,328116,328119,328120,328128,328135,328153,328157,kib2018-02-194-5/+19
| | | | | | | | | | | | | | 328166,328177,328199,328202,328205,328468,328470,328624,328625,328627, 328628,329214,329297,329365: Meltdown mitigation by PTI, PCID optimization of PTI, and kernel use of IBRS for some mitigations of Spectre. Tested by: emaste, Arshan Khanifar <arshankhanifar@gmail.com> Discussed with: jkim Sponsored by: The FreeBSD Foundation (cherry picked from commit 6dd025b40ee6870bea6ba670f30dcf684edc3f6c)
* MFC r327964:kib2018-02-192-0/+23
| | | | | | | Enumerate and print Intel CPU features for Speculative Execution Side Channel Mitigations. (cherry picked from commit f607d3f37dbe011b8b06a6dbcd1345c4c852b1f4)
* MFC r323822 (by cem):kib2018-02-192-0/+8
| | | | | | x86: Decode AMD "Extended Feature Extensions ID EBX" bits. (cherry picked from commit 5d6b85eb27654d9d704c4c9808eced42d040840e)
* MFC r327469:kib2018-02-191-0/+1
| | | | | | Add CR4.SMAP control bit. (cherry picked from commit e0589cb396337b99d04e160c8b192ea298b623a1)
* MFC r327118:kib2018-02-191-0/+1
| | | | | | | Add missed AVX512VL (128 and 256 bit vector length) extension identification bit. (cherry picked from commit 67e50e43299002bef26a498b82129fa9dd48f9a6)
* MFC r327597:kib2018-02-191-1/+2
| | | | | | Make it possible to re-evaluate cpu_features. (cherry picked from commit a586b974f77aedb619baf0454435fa4016339161)
* MFC 322323 by jkimsephe2018-02-191-0/+1
| | | | | | | | | | | | Split identify_cpu() into two functions for amd64 as we do for i386. This reduces diff between amd64 and i386. Also, it fixes a regression introduced in r322076, i.e., identify_hypervisor() failed to identify some hypervisors. This function assumes cpu_feature2 is already initialized. Reported by: dexuan Tested by: dexuan (cherry picked from commit 173ac9160e83a9396d44938ef9789b6e62e48e70)
* MFC: r322076jkim2018-02-191-0/+1
| | | | | | Detect hypervisor early so that we set lower hz on it. (cherry picked from commit 1a04c4c6be5d589d138e45c2000dea4c9e4e2408)
* MFC r314636,r314700: MCA: add AMD Error Thresholding supportavg2017-04-141-0/+16
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* MFC r314398: Local APIC: add support for extended LVT entries found in AMD ↵avg2017-04-142-7/+47
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* MFC r315361 and r315364: Hide MONITORX/MWAITX from guests.grehan2017-03-251-0/+1
| | | | | | | | | | | | | | r315361 Add the AMD MONITORX/MWAITX feature definition introduced in Bulldozer/Ryzen CPUs. r315364 Hide the AMD MONITORX/MWAITX capability. Otherwise, recent Linux guests will use these instructions, resulting in #UD exceptions since bhyve doesn't implement MONITOR/MWAIT exits. This fixes boot-time hangs in recent Linux guests on Ryzen CPUs (and probably Bulldozer aka AMD FX as well).
* MFC r313194:kib2017-02-111-2/+0
| | | | Define the vm_ooffset_t and vm_pindex_t types as machine-independend.
* MFC 310048,310101,310239sephe2017-01-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 310048 hyperv: Implement "enlightened" time counter, which is rdtsc based. Reviewed by: kib Sponsored by: Microsoft Differential Revision: https://reviews.freebsd.org/D8763 310101 hyperv: Allow userland to ro-mmap reference TSC page This paves way to implement VDSO for the enlightened time counter. Reviewed by: kib Sponsored by: Microsoft Differential Revision: https://reviews.freebsd.org/D8768 310239 hyperv: Implement userspace gettimeofday(2) with Hyper-V reference TSC This 6 times gettimeofday performance, as measured by tools/tools/syscall_timing Reviewed by: kib Sponsored by: Microsoft Differential Revision: https://reviews.freebsd.org/D8789
* MFC 303753,308004: Add bounds checking on addresses used with /dev/mem.jhb2016-12-021-0/+14
| | | | | | | | | | | 303753: Don't permit mappings of invalid physical addresses on amd64 via /dev/mem. 308004: MFamd64: Add bounds checks on addresses used with /dev/mem. Reject attempts to read from or memory map offsets in /dev/mem that are beyond the maximum-supported physical address of the current CPU.
* MFC r307866:kib2016-11-082-0/+7
| | | | | | | | | | Handle broadcast NMIs. MFC r307880: Follow-up to r307866. MFC r308030: Use correct cpu id in the banner.
* MFC 305836: Remove 'cpu' and 'cpu_class' on amd64.jhb2016-11-082-6/+0
| | | | | | | | The 'cpu' and 'cpu_class' variables were always set to the same value on amd64 and are legacy holdovers from i386. Remove them entirely on amd64. Requested by: kib (MFC)
* Merge bde improvements for ddb on x86, mostly for single-stepping andkib2016-11-071-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vm86 mode. MFC r304085 (by bde): Fix the variables $esp, $ds, $es, $fs, $gs and $ss in vm86 mode. Fix PC_REGS() so that printing of instructions works in some useful cases. MFC r304962 (by bde): Expand error messages: print symbol names, parentheses and shift tokens, and negative shift counts. Fix error messages. MFC r305612 (by bde): Fix single-stepping of instructions emulated by vm86. MFC r305661 (by bde): Give the full syntax of the 'count' arg for all commmands that support it. Give the full syntax of the 'addr' arg for these commands and some others. Rename it from 'address' for the generic command. Fix description of how 'count' is supposed to work for the 'break' command. Don't (mis)describe the syntax of the comma for the 'step' command. Expand the description for the generic command. Give the full syntax for the 'examine' command. It was also missing the possible values for the modifier. MFC r305663 (by bde): Fix stopping when the specified breakpoint count is reached. MFC r305665 (by bde): Pass the trap type and code down from db_trap() to db_stop_at_pc() so that the latter can easily determine what the trap type actually is after callers are fixed to encode the type unambigously. MFC r305807 (by bde): Use the MI macro TRAPF_USERMODE() instead of open-coded checks for SEL_UPL and sometimes PSL_VM. Fix logic errors in treating vm86 bioscall mode as kernel mode. The main place checked all the necessary flags, but put the necessary parentheses for the PSL_VM and PCB_VM86CALL checks in the wrong place. MFC r305811 (by bz): Try to fix LINT builds after r305807. MFC r305840 (by bde): Abort single stepping in ddb if the trap is not for single-stepping. MFC r305862 (by bde): Ifdef the new dr6 variable for KDB. MFC r305864 (by bde): Statically initialize the run mode to the one that will become current on first entry. Don't reset to the run mode to STEP_NONE when stopping, and remove STEP_NONE. MFC r305865 (by bde): Fix decoding of tf_rsp on amd64, and move TF_HAS_STACKREGS() to the i386-only section, and fix a comment about the amd64 kernel trapframe not having stackregs. MFC r305897 (by bde): Silently ignore unexpected single-step traps. MFC r306311 (by bde): Determine the operand/address size of %cs in a new function db_segsize(). Use db_segsize() to set the default operand/address size for disassembling. Fix db_print_loc_and_inst() to ask for the normal format and not the alternate in normal operation. Use db_segsize() to avoid trying to print a garbage stack trace if %cs is 16 bits.
* MFC r306680:kib2016-10-241-1/+1
| | | | Reduce the cost of TLB invalidation on x86 by using per-CPU completion flags.
* MFC r305978:kib2016-10-031-0/+8
| | | | Detect x2APIC mode on boot and obey it.
* MFC r304285:kib2016-09-161-1/+9
| | | | Implement userspace gettimeofday(2) with HPET timecounter.
* Implement _ALIGN() using internal integer types.ed2016-05-311-2/+2
| | | | | | | The existing version depends on register_t and uintptr_t, which are only available when including headers such as <sys/types.h>. As this macro is used by <sys/socket.h>, for example, it should be written in such a way that it doesn't depend on those types.
* Add missing dependency on <machine/_limits.h>.ed2016-05-311-2/+4
| | | | | | | | | | | In r227474, this header file was changed to define SIG_ATOMIC_{MIN,MAX} in terms of LONG_{MIN,MAX}. Unlike all of the definitions in this header file, LONG_{MIN,MAX} is provided by <limits.h>. Remove the dependency on <limits.h> by using __LONG_{MIN,MAX} instead and including <machine/_limits.h>. This change is needed to make SIG_ATOMIC_{MIN,MAX} work without including any other header files.
* Add missing dependency on <machine/_limits.h>.ed2016-05-311-0/+2
| | | | | | This header uses __INT_MIN and __INT_MAX, which is provided by <machine/_limits.h>. This is needed to make <stdint.h>'s WCHAR_MIN and WCHAR_MAX work without including other headers as well.
* hyperv/vmbus: Rename ISR functionssephe2016-05-311-1/+0
| | | | | | MFC after: 1 week Sponsored by: Microsoft OSTC Differential Revision: https://reviews.freebsd.org/D6601
* Add x86 CPU features definitions published in the Intel SDM rev. 58.kib2016-04-161-0/+14
| | | | | Sponsored by: The FreeBSD Foundation MFC after: 1 week
* re-enable AMD Topology extension on certain models if disabled by BIOSavg2016-04-122-1/+2
| | | | | | | | | | | | | Some BIOSes disable AMD Topology extension on AMD Family 15h notebook processors. We re-enable the extension, so that we can properly discover core and cache topology. Linux seems to do the same. Reported by: Johannes Dieterich <dieterich.joh@gmail.com> Reviewed by: jhb, kib Tested by: Johannes Dieterich <dieterich.joh@gmail.com> (earlier version) MFC after: 3 weeks Differential Revision: https://reviews.freebsd.org/D5883
* Type of the interrupt handlers on x86 cannot be expressed in C.kib2016-03-291-0/+7
| | | | | | | | Simplify and unify placeholder type definitions. Reviewed by: jhb Sponsored by: The FreeBSD Foundation Differential revision: https://reviews.freebsd.org/D5771
* Add defines for the LAPIC TSC deadline timer mode. The LVT timer modekib2016-03-282-3/+6
| | | | | | | | field is two-bit, extend the mask. Also add comments about all MSRs writes to which are not serializing. Sponsored by: The FreeBSD Foundation
* POSIX states that #include <signal.h> shall make both mcontext_t andkib2016-02-121-0/+5
| | | | | | | | | | | | | | | | | | | | ucontext_t available. Our code even has XXX comment about this. Add a bit of compliance by moving struct __ucontext definition into sys/_ucontext.h and including it into signal.h and sys/ucontext.h. Several machine/ucontext.h headers were changed to use namespace-safe types (like uint64_t->__uint64_t) to not depend on sys/types.h. struct __stack_t from sys/signal.h is made always visible in private namespace to satisfy sys/_ucontext.h requirements. Apparently mips _types.h pollutes global namespace with f_register_t type definition. This commit does not try to fix the issue. PR: 207079 Reported and tested by: Ting-Wei Lan <lantw44@gmail.com> Sponsored by: The FreeBSD Foundation MFC after: 2 weeks
* Convert rman to use rman_res_t instead of u_longjhibbits2016-01-272-3/+4
| | | | | | | | | | | | | | | | | | | | Summary: Migrate to using the semi-opaque type rman_res_t to specify rman resources. For now, this is still compatible with u_long. This is step one in migrating rman to use uintmax_t for resources instead of u_long. Going forward, this could feasibly be used to specify architecture-specific definitions of resource ranges, rather than baking a specific integer type into the API. This change has been broken out to facilitate MFC'ing drivers back to 10 without breaking ABI. Reviewed By: jhb Sponsored by: Alex Perez/Inertial Computing Differential Revision: https://reviews.freebsd.org/D5075
* Move amd64 metadata.h to x86 and share with i386emaste2016-01-071-0/+57
| | | | MFC after: 1 week
* Add standard extended feature bit 6 from the Intel SDM rev. 57, whichkib2015-12-291-0/+1
| | | | | | | | indicates that data-pointer in the saved x87 FPU state is only updated on FPU exceptions. Sponsored by: The FreeBSD Foundation MFC after: 1 week
* Move shared variables from {amd64,i386}/initcpu.c to x86/identcpu.c.jhb2015-12-231-0/+54
| | | | | | | | While here, move the common bits of <machine/cputypes.h> to <x86/cputypes.h> as well. Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D4670
* x86: Add CPUID_STDEXT_* macros for CPU feature bitscem2015-12-211-0/+5
| | | | | | A follow-up to r292478 and r292488. Sponsored by: EMC / Isilon Storage Division
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