| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Revert "Revert "MFC r328083,328096,328116,328119,328120,328128,328135,328153,... | Luiz Souza | 2018-02-23 | 4 | -5/+19 |
| * | Revert "Revert "MFC r327964:"" | Luiz Souza | 2018-02-23 | 2 | -0/+23 |
| * | Revert "Revert "MFC r323822 (by cem):"" | Luiz Souza | 2018-02-23 | 2 | -0/+8 |
| * | Revert "Revert "MFC r327469:"" | Luiz Souza | 2018-02-23 | 1 | -0/+1 |
| * | Revert "Revert "MFC r327118:"" | Luiz Souza | 2018-02-23 | 1 | -0/+1 |
| * | Revert "Revert "MFC r327597:"" | Luiz Souza | 2018-02-23 | 1 | -1/+2 |
| * | Revert "Revert "MFC 322323 by jkim"" | Luiz Souza | 2018-02-23 | 1 | -0/+1 |
| * | Revert "Revert "MFC: r322076"" | Luiz Souza | 2018-02-23 | 1 | -0/+1 |
| * | Revert "MFC: r322076" | Luiz Souza | 2018-02-21 | 1 | -1/+0 |
| * | Revert "MFC 322323 by jkim" | Luiz Souza | 2018-02-21 | 1 | -1/+0 |
| * | Revert "MFC r327597:" | Luiz Souza | 2018-02-21 | 1 | -2/+1 |
| * | Revert "MFC r327118:" | Luiz Souza | 2018-02-21 | 1 | -1/+0 |
| * | Revert "MFC r327469:" | Luiz Souza | 2018-02-21 | 1 | -1/+0 |
| * | Revert "MFC r323822 (by cem):" | Luiz Souza | 2018-02-21 | 2 | -8/+0 |
| * | Revert "MFC r327964:" | Luiz Souza | 2018-02-21 | 2 | -23/+0 |
| * | Revert "MFC r328083,328096,328116,328119,328120,328128,328135,328153,328157," | Luiz Souza | 2018-02-21 | 4 | -19/+5 |
| * | MFC r328083,328096,328116,328119,328120,328128,328135,328153,328157, | kib | 2018-02-19 | 4 | -5/+19 |
| * | MFC r327964: | kib | 2018-02-19 | 2 | -0/+23 |
| * | MFC r323822 (by cem): | kib | 2018-02-19 | 2 | -0/+8 |
| * | MFC r327469: | kib | 2018-02-19 | 1 | -0/+1 |
| * | MFC r327118: | kib | 2018-02-19 | 1 | -0/+1 |
| * | MFC r327597: | kib | 2018-02-19 | 1 | -1/+2 |
| * | MFC 322323 by jkim | sephe | 2018-02-19 | 1 | -0/+1 |
| * | MFC: r322076 | jkim | 2018-02-19 | 1 | -0/+1 |
| * | MFC r314636,r314700: MCA: add AMD Error Thresholding support | avg | 2017-04-14 | 1 | -0/+16 |
| * | MFC r314398: Local APIC: add support for extended LVT entries found in AMD pr... | avg | 2017-04-14 | 2 | -7/+47 |
| * | MFC r315361 and r315364: Hide MONITORX/MWAITX from guests. | grehan | 2017-03-25 | 1 | -0/+1 |
| * | MFC r313194: | kib | 2017-02-11 | 1 | -2/+0 |
| * | MFC 310048,310101,310239 | sephe | 2017-01-05 | 1 | -0/+1 |
| * | MFC 303753,308004: Add bounds checking on addresses used with /dev/mem. | jhb | 2016-12-02 | 1 | -0/+14 |
| * | MFC r307866: | kib | 2016-11-08 | 2 | -0/+7 |
| * | MFC 305836: Remove 'cpu' and 'cpu_class' on amd64. | jhb | 2016-11-08 | 2 | -6/+0 |
| * | Merge bde improvements for ddb on x86, mostly for single-stepping and | kib | 2016-11-07 | 1 | -3/+13 |
| * | MFC r306680: | kib | 2016-10-24 | 1 | -1/+1 |
| * | MFC r305978: | kib | 2016-10-03 | 1 | -0/+8 |
| * | MFC r304285: | kib | 2016-09-16 | 1 | -1/+9 |
| * | Implement _ALIGN() using internal integer types. | ed | 2016-05-31 | 1 | -2/+2 |
| * | Add missing dependency on <machine/_limits.h>. | ed | 2016-05-31 | 1 | -2/+4 |
| * | Add missing dependency on <machine/_limits.h>. | ed | 2016-05-31 | 1 | -0/+2 |
| * | hyperv/vmbus: Rename ISR functions | sephe | 2016-05-31 | 1 | -1/+0 |
| * | Add x86 CPU features definitions published in the Intel SDM rev. 58. | kib | 2016-04-16 | 1 | -0/+14 |
| * | re-enable AMD Topology extension on certain models if disabled by BIOS | avg | 2016-04-12 | 2 | -1/+2 |
| * | Type of the interrupt handlers on x86 cannot be expressed in C. | kib | 2016-03-29 | 1 | -0/+7 |
| * | Add defines for the LAPIC TSC deadline timer mode. The LVT timer mode | kib | 2016-03-28 | 2 | -3/+6 |
| * | POSIX states that #include <signal.h> shall make both mcontext_t and | kib | 2016-02-12 | 1 | -0/+5 |
| * | Convert rman to use rman_res_t instead of u_long | jhibbits | 2016-01-27 | 2 | -3/+4 |
| * | Move amd64 metadata.h to x86 and share with i386 | emaste | 2016-01-07 | 1 | -0/+57 |
| * | Add standard extended feature bit 6 from the Intel SDM rev. 57, which | kib | 2015-12-29 | 1 | -0/+1 |
| * | Move shared variables from {amd64,i386}/initcpu.c to x86/identcpu.c. | jhb | 2015-12-23 | 1 | -0/+54 |
| * | x86: Add CPUID_STDEXT_* macros for CPU feature bits | cem | 2015-12-21 | 1 | -0/+5 |
