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* Add a PCI bridge for the Freescale PCIe Root Complexjhibbits2015-05-112-3/+115
* Add a GPIO driver for the mpc85xx.jhibbits2015-04-041-0/+307
* Move Open Firmware device root on PowerPC, ARM, and MIPS systems tonwhitehorn2014-02-052-2/+2
* Rearchitect platform memory map parsing to make it lessnwhitehorn2013-12-011-4/+4
* Move CCSR discovery into the platform module, while simultaneously makingnwhitehorn2013-11-172-2/+56
* Rename the "bare" platform "mpc85xx", which is what it actually is, andnwhitehorn2013-11-111-0/+356
* Be more flexible about which compatible strings to accept. This brings upnwhitehorn2013-11-111-0/+1
* Teach nexus(4) about Open Firmware (e.g. FDT) on ARM and MIPS, retiringnwhitehorn2013-11-052-2/+2
* Interrelated improvements to early boot mappings:nwhitehorn2013-10-262-0/+3
* Remove all the instances of '#undef DEBUG' from kernel.loos2013-10-251-2/+0
* Convert e500 PCI driver to use common PPC PCI bus glue. No functionalnwhitehorn2013-10-251-274/+75
* Allow PIC drivers to translate firmware sense codes for themselves. Thisnwhitehorn2013-10-241-0/+37
* Since the PS3 port was committed, the AIM nexus device works perfectly finenwhitehorn2013-10-201-201/+0
* Align the PCI Express #defines with the style used for the PCI-Xgavin2012-09-181-6/+6
* Support lbc interrupts:marcel2012-07-032-34/+108
* Properly implement the bus_config_intr, bus_setup_intr and bus_teardown_intrmarcel2012-07-021-2/+58
* Import eSDHC driver for Freescale integrated controller.raj2012-05-262-0/+1603
* Move OpenPIC FDT bus glue to a shared location, so that other PowerPCraj2012-05-261-93/+0
* A few improvements:marcel2012-05-242-64/+179
* Remove Semihakf-ism. DEBUG is a kernel configuration option. Itmarcel2012-05-241-3/+0
* Just return if the size of the window is 0. This can happen when themarcel2012-05-241-1/+7
* Either the I/O port range or the memory mapped I/O range may not bemarcel2012-05-241-2/+7
* Fix missing header for powerpc_iomb().nwhitehorn2012-04-231-0/+1
* Replace eieio; sync for creating bus-space memory barriers with sync.nwhitehorn2012-04-221-1/+1
* - There's no need to overwrite the default device method with the defaultmarius2011-11-222-4/+2
* Fix r222813: we need to include sys/cpuset.h. because the PIC interfacemarcel2011-07-311-2/+2
* MFCattilio2011-05-292-12/+14
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| * o Determine the number of LAWs in a way the is future proof. Only themarcel2011-05-281-7/+14
| * Remove unused defines. They're distracting...marcel2011-05-281-5/+0
| * Retire isa_setup_intr() and isa_teardown_intr() and use the generic busjhb2011-05-061-17/+0
* | Fix compilation.attilio2011-05-181-1/+2
* | MFCattilio2011-05-061-17/+0
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* Rename INTR_VEC to MAP_IRQ. From the OFW or FDT we obtain amarcel2011-02-021-3/+3
* Fix the interrupt code, broken 7 months ago. The interrupt frameworkmarcel2011-01-294-103/+40
* Have nexus behave the same as the one on ARM (marvell SoCs), so as tomarcel2011-01-291-8/+17
* Restructure how reset and poweroff are handled on PowerPC systems, sincenwhitehorn2010-08-311-25/+0
* Convert Freescale PowerPC platforms to FDT convention.raj2010-07-1114-1990/+1694
* Move the EOI logic when starting ithreads into intr_machdep instead ofnwhitehorn2010-07-061-2/+0
* Remove the unneeded header <machine/intr.h>.marcel2010-07-022-2/+0
* Assign PCI intline values for ISA interrupts using the new INTR_VEC()marcel2010-06-241-3/+3
* Pass the device_t of the AT PIC driver to atpic_intr() so thatmarcel2010-06-241-5/+2
* With openpic(4) using active-low as the default polarity, reconfiguremarcel2010-06-231-2/+9
* Configure interrupts on SMP systems to be distributed among all onlinenwhitehorn2010-06-231-0/+1
* Provide for multiple, cascaded PICs on PowerPC systems, and extend thenwhitehorn2010-06-186-29/+58
* Fix an off-by-one bug for the number of slots on a PCI/PCI-X bus.marcel2010-03-231-7/+8
* Add definitions for a 4th PCI host controller. No Freescale processormarcel2010-03-232-1/+16
* Make PCI Express host controllers functional, by:marcel2010-02-011-0/+26
* Use the capability pointer to indicate whether the host controller ismarcel2010-02-011-12/+13
* Don't check the device ID. Instead, check the class, subclass andmarcel2010-01-291-28/+13
* Always allocate PCI/ISA interrupts as shareable so that sharedmarcel2009-11-201-0/+1
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