| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Update HID defines for E500mc and E5500 CPU cores. | raj | 2012-05-25 | 1 | -0/+53 |
| * | MFppc64: | nwhitehorn | 2010-07-13 | 1 | -1/+2 |
| * | Turn on NAP mode on G5 systems, and refactor the HID0 setup code a little. | nwhitehorn | 2009-10-24 | 1 | -0/+7 |
| * | Centralize setting HID0/1 for E500. Rename HID defines which are specific | raj | 2009-04-22 | 1 | -4/+11 |
| * | Rework the way we get the cacheline size. Instead of having a table of | nwhitehorn | 2009-04-12 | 1 | -0/+2 |
| * | Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode | nwhitehorn | 2009-04-04 | 1 | -0/+1 |
| * | Unify and generalize PowerPC headers, adjust AIM code accordingly. | raj | 2008-03-02 | 1 | -34/+39 |
| * | Teach PowerPC CPU identification routines to recognize e500 cores. Fix style | raj | 2008-02-25 | 1 | -2/+9 |
| * | HID0 updates: | grehan | 2005-02-04 | 1 | -3/+6 |
| * | Definitions for MPC7457 CPU type and HID0 bits | grehan | 2004-02-09 | 1 | -35/+40 |
| * | - Update spr.h | benno | 2003-02-05 | 1 | -0/+129 |
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index : FreeBSD-src | |
| Raptor Engineering's fork of pfsense FreeBSD src with pfSense changes | Raptor Engineering, LLC |
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