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* Avoid spurious compiler warning about an uninitialized variable.nwhitehorn2014-02-011-1/+1
* Rearchitect platform memory map parsing to make it lessnwhitehorn2013-12-011-4/+4
* badaddr() is used only in the grackle PCI driver, so move its definitionnwhitehorn2013-11-271-60/+0
* Unify handling of illegal instruction faults between AIM and Book-E. Thisnwhitehorn2013-11-171-16/+1
* Split the function of the PCB_FPU flags into two: PCB_FPU now indicates thatnwhitehorn2013-11-171-0/+5
* Move CCSR discovery into the platform module, while simultaneously makingnwhitehorn2013-11-171-8/+0
* Make sure that TLB1 mappings are aligned correctly.nwhitehorn2013-11-171-0/+1
* Use the same implementation of copyinout.c for both AIM and Book-E. Thisnwhitehorn2013-11-111-315/+0
* Follow up r223485, which made AIM use the ABI thread pointer instead ofnwhitehorn2013-11-116-169/+20
* Rename the "bare" platform "mpc85xx", which is what it actually is, andnwhitehorn2013-11-111-214/+9
* Do not panic if pmap_mincore() is called. This prevents crashing userlandnwhitehorn2013-11-061-1/+1
* Make devices with registers into the KVA region work reliably. Without this,nwhitehorn2013-10-261-6/+18
* Handle (in a slightly ugly way) ePAPR-type loaders that just place anwhitehorn2013-10-261-4/+36
* Bump initial TLB size. The kernel is not necessarily less than 16 MB anynwhitehorn2013-10-261-1/+1
* Interrelated improvements to early boot mappings:nwhitehorn2013-10-263-29/+69
* Fix concurrency issues with TLB1 updates and make pmap_kextract() searchnwhitehorn2013-10-261-11/+27
* Add pmap_mapdev_attr() and pmap_kenter_attr() interfaces. pmap_set_memattr()nwhitehorn2013-10-261-5/+66
* A quick addendum: the standard says that timebase-frequency can be eithernwhitehorn2013-10-231-3/+18
* If the device tree directly contains the timebase frequency, use it. Thisnwhitehorn2013-10-231-0/+4
* Make hard-wired TLB allocations be at minimum one page. This is required bynwhitehorn2013-10-211-0/+2
* Avoid sign overflow if there are more than 2 GB of RAM.nwhitehorn2013-10-201-4/+5
* Replace the two almost-exactly-identical AIM and Book-E clock.cnwhitehorn2013-10-201-280/+0
* Unify the AIM and Book-E vm_machdep.c implementations, which previouslynwhitehorn2013-10-201-408/+0
* - Create kern.ipc.sendfile namespace, and put the new "readhead" OIDglebius2013-09-221-0/+11
* The pmap function pmap_clear_reference() is no longer used. Remove it.alc2013-09-201-34/+0
* Revert r254501. Instead, reuse the type stability of the struct pmapkib2013-08-221-3/+1
* The soft and hard busy mechanism rely on the vm object lock to work.attilio2013-08-091-12/+10
* Replace kernel virtual address space allocation with vmem. This providesjeff2013-08-072-2/+2
* Introduce new structure sfstat for collecting sendfile's statisticsae2013-07-151-1/+1
* o Relax locking assertions for vm_page_find_least()attilio2013-05-211-0/+2
* Relax the object locking assertion in pmap_enter_locked().alc2013-05-171-1/+1
* Add pmap function pmap_copy_pages(), which copies the content of thekib2013-03-141-0/+33
* MFCattilio2013-03-021-19/+10
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| * MFcalloutng:mav2013-02-281-19/+10
| * Merge from vmobj-rwlock:attilio2013-02-271-3/+2
| * Merge from vmc-playground branch:attilio2013-02-261-2/+1
* | MFCattilio2013-02-261-2/+1
* | Hide the details for the assertion for VM_OBJECT_LOCK operations.attilio2013-02-211-5/+5
* | Fix other architectures and ZFS.attilio2013-02-211-0/+1
* | There is no need to use VM_OBJECT_LOCKED() as the assertion won'tattilio2013-02-201-3/+2
* | Switch vm_object lock to be a rwlock.attilio2013-02-201-4/+4
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* Introduce PLATFORMMETHOD_END and use it.rpaulo2013-02-131-1/+1
* Replace all uses of the page queues lock by a R/W lock that is privatealc2012-11-031-34/+40
* 1. Have the APs initialize the TLB1 entries from what has beenmarcel2012-11-034-58/+89
* userret() already checks for td_locks when INVARIANTS is enabled, soattilio2012-09-081-1/+0
* Avoid recursion on the pvh global lock in the aim oea pmap.alc2012-07-101-1/+1
* Fix a typo that resulted in or-ing PTE_UW twice whrn PTE_SW was needed.marcel2012-07-021-1/+1
* Handle traps from the debugger. We need to catch them and re-entermarcel2012-07-021-0/+7
* Invalidate any TLB1 entries we don't need. The firmware (e.g. U-Boot)marcel2012-07-021-0/+4
* Implement cpu_flush_dcache(). This allows us to optimize __syncicache()marcel2012-07-021-1/+18
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