summaryrefslogtreecommitdiffstats
path: root/sys/mips/atheros/ar91xx_chip.c
Commit message (Expand)AuthorAgeFilesLines
* Replace mips/sentry5 with mips/broadcomlandonf2016-06-251-2/+0
* Reshuffle all of the DDR flush operations into a single switch/mux,adrian2015-07-041-17/+13
* Add new features - an MDIO clock, WMAC reset, GMAC reset and ethernetadrian2013-10-151-1/+1
* Initialise the watchdog and UART frequencies.adrian2013-07-211-0/+2
* Add the reference clock for each supported chip.adrian2013-03-271-0/+2
* Further ar71xx MII support improvements.adrian2012-05-021-19/+18
* MII related infrastructure changes.adrian2012-05-021-0/+2
* The AR913x MII speed configuration matches the AR71xx MII configuration.adrian2012-04-151-8/+2
* Begin fleshing out MII clock rate configuration changes.adrian2012-03-171-0/+8
* Style(9) changes.adrian2011-12-131-57/+59
* Join chip depended methods for arge0 and arge1 into single call with unit.ray2011-11-271-40/+33
* Remove duplicate header includeskevlo2011-06-261-5/+3
* Add the IP2 DDR flush handlers.adrian2011-04-281-1/+8
* * Add wireless MAC reset, in prep for bringing over AR9130 support.adrian2011-03-131-4/+15
* Implement PLL generalisation in preparation for use in if_arge.adrian2010-08-191-0/+34
* Add initial Atheros AR91XX support.adrian2010-08-191-0/+171
OpenPOWER on IntegriCloud