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* Adjust the debugger options slightly. This should help me do the rightkensmith2011-10-271-2/+5
* Move the debugging support to its own section. This matches what iskensmith2011-10-261-7/+9
* People porting FreeBSD to new architectures ought not have todas2011-10-211-0/+9
* Add a warning about why sbp(4) is commented out so that curious folkskensmith2011-10-191-0/+1
* Comment out the sbp(4) driver for architectures that support it.kensmith2011-10-181-1/+1
* Remove unused define.kib2011-10-071-1/+0
* Remove locking of the vm page queues from several pmaps, which onlykib2011-09-281-2/+0
* In order to maximize the re-usability of kernel code in user space thiskmacy2011-09-162-4/+4
* Inline the syscallenter() and syscallret(). This reduces the time measuredkib2011-09-112-0/+4
* Split the vm_page flags PG_WRITEABLE and PG_REFERENCED into atomickib2011-09-061-16/+16
* - Move the PG_UNMANAGED flag from m->flags to m->oflags, renaming the flagkib2011-08-091-14/+13
* Fix kernel core dumps now that the kernel is using PBVM. The basicmarcel2011-08-061-1/+4
* Follow-up commit: refactor pmap_kextract() to make it easier tomarcel2011-08-051-17/+28
* Remove stray semicolon in pmap_kextract() that turned the conditionalmarcel2011-08-051-1/+1
* Bump MAXCPU for amd64, ia64 and XLP mips appropriately.attilio2011-07-191-1/+1
* On 64 bit architectures size_t is 8 bytes, thus it should use an 8 bytesattilio2011-07-191-2/+2
* Add the possibility to specify from kernel configs MAXCPU value.attilio2011-07-191-0/+2
* - Remove the eintrcnt/eintrnames usage and introduce the concept ofattilio2011-07-181-2/+5
* Enable NEW_PCIB by default on ia64.jhb2011-07-181-0/+2
* Implement bus_adjust_resource() for the ia64 nexus driver.jhb2011-07-181-17/+34
* Don't assume pmap_mapdev() gets called only for memory mapped I/Omarcel2011-07-161-3/+29
* Don't send EOI to the CPU before we handled the interrupt. This couldmarcel2011-07-162-4/+7
* Add a few more helper functions for working with memory descriptors:marcel2011-07-162-4/+54
* Implement basic support for memory attributes. At this time we onlymarcel2011-07-083-27/+121
* Disable PREEMPTION for now. See also PR ia64/147501.marcel2011-07-041-1/+1
* With retirement of cpumask_t and usage of cpuset_t for representing aattilio2011-07-041-9/+7
* When iterating over a paging queue, explicitly check for PG_MARKER, insteadalc2011-07-021-1/+1
* Change the management of nested faults by switching to physicalmarcel2011-06-302-133/+122
* Add a new option, OBJPR_NOTMAPPED, to vm_object_page_remove(). Passing thisalc2011-06-291-2/+2
* Oops. The sec field of struct bintime is *not* a 32-bit type.marcel2011-06-251-1/+1
* Define the minimum fractional period in terms of hz. We know hz ismarcel2011-06-251-2/+2
* Replace the original copyright notice with my own. Everything inmarcel2011-06-251-30/+22
* Update copyright.marcel2011-06-251-1/+1
* Switch to the event timers infrastructure. This includes:marcel2011-06-257-106/+136
* Unblock the outgoing thread after we performed pmap_switch() tomarcel2011-06-231-2/+2
* Use a non-standard page size that is supported.alc2011-06-211-1/+1
* Improve on style(9)marcel2011-06-171-94/+73
* Properly serialize the global shootdown with the instructionmarcel2011-06-172-2/+15
* Add the model number for the Montvale processor (marketed as Itanium 2 9100).marcel2011-06-111-0/+3
* MFCattilio2011-06-071-0/+2
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| * Call set_cputicker() to have the time counter use the ITC register.marcel2011-06-071-0/+2
* | MFCattilio2011-06-063-18/+47
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| * Improve cpu_idle():marcel2011-06-063-18/+47
| * On multi-core, multi-threaded PPC systems, it is important that the threadsnwhitehorn2011-05-313-6/+6
* | MFCattilio2011-05-313-6/+6
* | MFCattilio2011-05-144-23/+25
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| * Prefer switching the memory stack from user to kernel *before* switchingmarcel2011-05-141-3/+4
| * Sharpening the saw:marcel2011-05-141-8/+12
| * Be pedantic: mark the pcpu pointer (= register r13) itself as volatile.marcel2011-05-141-1/+1
| * Turn ia64_srlz() and ia64_srlz_i() into defines so that the code ismarcel2011-05-141-11/+8
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